Table 2. VDD = 2.7 V to 3.6" />
參數(shù)資料
型號: AD7450ABRMZ
廠商: Analog Devices Inc
文件頁數(shù): 26/29頁
文件大?。?/td> 0K
描述: IC ADC 12BIT DIFF IN 1MSPS 8MSOP
標(biāo)準(zhǔn)包裝: 50
位數(shù): 12
采樣率(每秒): 1M
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 9.25mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
輸入數(shù)目和類型: 1 個差分,單極
配用: EVAL-AD7450CBZ-ND - BOARD EVALUATION FOR AD7450
AD7440/AD7450A
Rev. C | Page 5 of 28
AD7450A–SPECIFICATIONS
Table 2. VDD = 2.7 V to 3.6 V, fSCLK = 18 MHz, fS = 1 MSPS, VREF = 2.0 V; VDD = 4.75 V to 5.25 V, fSCLK = 18 MHz, fS = 1 MSPS,
VREF = 2.5 V; VCM1 = VREF
A
MIN
MAX
; T = T
to T
, unless otherwise noted. Temperature range for B Version: –40°C to +85°C.
Parameter
Test Conditions/Comments
B Version
Unit
DYNAMIC PERFORMANCE
fIN = 100 kHz
Signal-to-(Noise + Distortion) (SINAD)2
70
dB min
Total Harmonic Distortion (THD)2
VDD = 4.75 V to 5.25 V, –86 dB typ
–76
dB max
VDD = 2.7 V to 3.6 V, –84 dB typ
–74
dB max
Peak Harmonic or Spurious Noise2
VDD = 4.75 V to 5.25 V, –86 dB typ
–76
dB max
VDD = 2.7 V to 3.6 V, –84 dB typ
–74
dB max
Intermodulation Distortion (IMD)2
fa = 90 kHz, fb = 110 kHz
Second-Order Terms
–89
dB typ
Third-Order Terms
–89
dB typ
Aperture Delay2
5
ns typ
Aperture Jitter2
50
ps typ
Full Power Bandwidth2, 3
@ –3 dB
20
MHz typ
@ –0.1 dB
2.5
MHz typ
DC ACCURACY
Resolution
12
Bits
Integral Nonlinearity (INL)2
±1
LSB max
Differential Nonlinearity (DNL)2
Guaranteed no missed codes to 12 bits
±0.95
LSB max
Zero-Code Error2
±6
LSB max
Positive Gain Error2
±2
LSB max
Negative Gain Error2
±2
LSB max
ANALOG INPUT
Full-Scale Input Span
2 × VREF 4
VIN+ – VIN–
V
Absolute Input Voltage
VIN+
VCM = VREF
VCM ± VREF/2
V
VIN–
VCM = VREF
VCM ± VREF/2
V
DC Leakage Current
±1
μA max
Input Capacitance
When in track-and-hold
30/10
pF typ
REFERENCE INPUT
VREF Input Voltage
VDD = 4.75 V to 5.25 V
(±1% tolerance for specified performance)
V
VDD = 2.7 V to 3.6 V
(±1% tolerance for specified performance)
V
DC Leakage Current
±1
μA max
VREF Input Capacitance
When in track-and-hold
10/30
pF typ
LOGIC INPUTS
Input High Voltage, VINH
2.4
V min
Input Low Voltage, VINL
0.8
V max
Input Current, IIN
Typically 10 nA, VIN = 0 V or VDD
±1
μA max
Input Capacitance, CIN7
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDD = 4.75 V to 5.25 V; ISOURCE = 200 μA
2.8
V min
VDD = 2.7 V to 3.6 V; ISOURCE = 200 μA
2.4
V min
Output Low Voltage, VOL
ISINK = 200 μA
0.4
V max
Floating-State Leakage Current
±1
μA max
Floating-State Output Capacitance7
10
pF max
Output Coding
Twos complement
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