參數(shù)資料
型號(hào): AD7392
廠商: Analog Devices, Inc.
英文描述: Parallel Input Micropower 10- and 12-Bit DACs(并行輸入微功耗12位D/A轉(zhuǎn)換器)
中文描述: 并行輸入微10 -和12位DAC(并行輸入微功耗12位的D / A轉(zhuǎn)換器)
文件頁數(shù): 3/12頁
文件大小: 331K
代理商: AD7392
–3–
REV. 0
AD7392/AD7393
AD7393 ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
3 V
6
10%
5 V
6
10%
Units
STATIC PERFORMANCE
Resolution
1
Relative Accuracy
2
Relative Accuracy
2
Differential Nonlinearity
2
Zero-Scale Error
Full-Scale Voltage Error
N
INL
INL
DNL
V
ZSE
V
FSE
10
6
1.75
6
2.0
6
0.8
9.0
6
32
10
6
1.75
6
2.0
6
0.8
9.0
6
32
Bits
LSB max
LSB max
LSB max
mV max
mV max
T
A
=
1
25
°
C
T
A
=
2
40
°
C,
1
85
°
C,
1
125
°
C
Monotonic
Data = 000
H
T
A
=
1
25
°
C,
1
85
°
C,
1
125
°
C,
Data = 3FF
H
T
A
=
2
40
°
C, Data = 3FF
H
Full-Scale Voltage Error
Full-Scale Tempco
3
V
FSE
TCV
FS
6
42
28
6
42
28
mV max
ppm/
°
C typ
REFERENCE INPUT
V
REF IN
Range
Input Resistance
Input Capacitance
3
V
REF
R
REF
C
REF
0/V
DD
2.5
5
0/V
DD
2.5
5
V min/max
M
typ
4
pF typ
ANALOG OUTPUT
Output Current (Source)
Output Current (Sink)
Capacitive Load
3
I
OUT
I
OUT
C
L
Data = 200
H
,
V
OUT
= 5 LSB
Data = 200
H
,
V
OUT
= 5 LSB
No Oscillation
1
3
100
1
3
100
mA typ
mA typ
pF typ
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
3
V
IL
V
IH
I
IL
C
IL
0.5
V
DD
2
0.6
10
10
0.8
V
DD
2
0.6
10
10
V min
V max
μ
A max
pF max
INTERFACE TIMING
3, 5
Chip Select Write Width
Data Setup
Data Hold
Reset Pulse Width
t
CS
t
DS
t
DH
t
RS
45
30
20
40
45
15
5
30
ns
ns
ns
ns
AC CHARACTERISTICS
Output Slew Rate
Settling Time
6
Shutdown Recovery Time
DAC Glitch
Digital Feedthrough
Feedthrough
SR
t
S
t
SDR
Q
Q
V
OUT
/V
REF
Data = 000
H
to 3FF
H
to 000
H
To
6
0.1% of Full Scale
0.05
70
0.05
60
80
65
15
V/
μ
s typ
μ
s typ
μ
s typ
nV/s typ
nV/s typ
Code 7FF
H
to 800
H
to 7FF
H
65
15
V
REF
= 1.5 V
DC
1
1 V p-p,
Data = 000
H
, f = 100 kHz
–63
–63
dB typ
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Positive Supply Current
Shutdown Supply Current
Power Dissipation
Power Supply Sensitivity
V
DD RANGE
I
DD
I
DD
I
DD–SD
P
DISS
PSS
DNL <
6
1 LSB
V
IL
= 0 V, No Load, T
A
=
1
25
°
C
V
IL
= 0 V, No Load
SHDN
= 0, V
IL
= 0 V, No Load
V
IL
= 0 V, No Load
V
DD
=
6
5%
2.7/5.5
55
100
0.1/1.5
300
0.003
2.7/5.5
55
100
0.1/1.5
500
0.006
V min/max
μ
A typ
μ
A max
μ
A typ/max
μ
W max
%/% max
NOTES
1
One LSB = V
REF
/1024 V for the 10-bit AD7393.
2
The first two codes (000
H
, 001
H
) are excluded from the linearity error measurement.
3
These parameters are guaranteed by design and not subject to production testing.
4
Typicals represent average readings measured at +25
°
C.
5
All input control signals are specified with t
R
= t
F
= 2 ns (10% to 90% of
1
3 V) and timed from a voltage level of 1.6 V.
6
The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
Specifications subject to change without notice.
(@ V
REF IN
= 2.5 V,
2
40
8
C < T
A
<
1
85
8
C, unless otherwise noted)
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