參數(shù)資料
型號: AD7226KP
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: LC2MOS Quad 8-Bit D/A Converter
中文描述: PARALLEL, 8 BITS INPUT LOADING, 3 us SETTLING TIME, 8-BIT DAC, PQCC20
封裝: PLASTIC, MO-047AA, LCC-20
文件頁數(shù): 9/12頁
文件大?。?/td> 247K
代理商: AD7226KP
AD7226
REV. A
–9–
Figure 14. AGND Bias Circuit
For a given V
IN
, increasing AGND above system GND will re-
duce the effective V
DD
–V
REF
which must be at least 4 V to en-
sure specified operation. Note that because the AGND pin is
common to all four DACs, this method biases up the output
voltages of all the DACs in the AD7226. Note that V
DD
and V
SS
of the AD7226 should be referenced to DGND.
3-PHASE SINE WAVE
T he circuit of Figure 15 shows an application of the AD7226 in
the generation of 3-phase sine waves which can be used to con-
trol small 3-phase motors. T he proper codes for synthesizing a
full sine wave are stored in EPROM, with the required phase-
shift of 120
°
between the three D/A converter outputs being
generated in software.
Data is loaded into the three D/A converters from the sine
EPROM via the microprocessor or control logic. T hree loops
are generated in software with each D/A converter being loaded
from a separate loop. T he loops run through the look-up table
producing successive triads of sinusoidal values with 120
°
sepa-
ration which are loaded to the D/A converters producing 3 sine
wave voltages 120
°
apart. A complete sine wave cycle is gener-
ated by stepping through the full look-up table. If a 256-element
sine wave table is used then the resolution of the circuit will be
1.4
°
(360
°
/256). Figure 17 shows typical resulting waveforms.
T he sine waves can be smoothed by filtering the D/A converter
outputs.
T he fourth D/A converter of the AD7226, DAC D, may be used
in a feedback configuration to provide a programmable refer-
ence voltage for itself and the other three converters. T his con-
figuration is shown in Figure 15. T he relationship of V
REF
to V
IN
is dependent upon digital code and upon the ratio of R
F
to R
and is given by the formula
(1
+
G
)
(1
+
G
.
D
D
)
V
IN
V
REF
=
where
G
= R
F
/R
and
D
D
is a fractional representation of the digital word
in latch D.
Alternatively, for a given V
IN
and resistance ratio, the required
value of D
D
for a given value of V
REF
can be determined from
the expression
D
D
=
(1
+
R
/
R
F
)
V
IN
V
REF
±
R
R
F
Figure 16 shows typical plots of V
REF
versus digital code for
three different values of R
F
. With V
IN
= +2.5 V and R
F
= 3 R
the peak-to-peak sine wave voltage from the converter outputs
will vary between +2.5 V and +10 V over the digital input code
range of 0 to 255.
Figure 16. Variation of V
REF
with Feedback Configuration
Figure 17. 3-Phase Sine Wave Output
Figure 15. 3-Phase Sine Wave Generation Circuit
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