參數(shù)資料
型號(hào): AD7225UQ
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: LC2MOS Quad 8-Bit DAC with Separate Reference Inputs
中文描述: QUAD, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP24
封裝: CERDIP-24
文件頁數(shù): 11/12頁
文件大小: 339K
代理商: AD7225UQ
AD7225
REV. B
–11–
MICROPROCE SSOR INT E RFACE
8085A/
8088
A15
A8
ALE
AD0
AD7
ADDRESS
DECODE
LATCH
EN
AD7225*
WR
A0
A1
LDAC
DB7
DB0
WR
ADDRESS BUS
ADDRESS DATA BUS
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
Figure 22. AD7225 to 8085A/8088 Interface,
Double-Buffered Mode
6809/
6502
A15
A0
E OR
φ
2
D0
D7
AD7225*
R/W
A0
A1
LDAC
DB7
DB0
WR
ADDRESS BUS
DATA BUS
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
ADDRESS
DECODE
EN
Figure 23. AD7225 to 6809/6502 Interface,
Single-Buffered Mode
Z-80
A15
A8
D0
D7
AD7225*
WR
A0
A1
LDAC
DB7
DB0
WR
ADDRESS BUS
DATA BUS
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
ADDRESS
DECODE
EN
MREQ
Figure 24. AD7225 to Z-80 Interface,
Double-Buffered Mode
68008
A23
A1
D0
D7
AD7225*
R/W
A0
A1
DB7
DB0
LDAC
WR
ADDRESS BUS
DATA BUS
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
ADDRESS
DECODE
EN
AS
DTACK
Figure 25. AD7225 to 68008 Interface,
Single-Buffered Mode
V
SS
GE NE RAT ION
Operating the AD7225 from dual supplies results in enhanced
performance over single supply operation on a number of pa-
rameters as previously outlined. Some applications may require
this enhanced performance, but may only have a single power
supply rail available. T he circuit of Figure 26 shows a method of
generating a negative voltage using one CD4049, operated from
a V
DD
of +15 V. T wo inverters of the hex inverter chip are used
as an oscillator. T he other four inverters are in parallel and used
as buffers for higher output current. T he square-wave output is
level translated to a negative-going signal, then rectified and fil-
tered. T he circuit configuration shown will provide an output
voltage of –5.1 V for current loadings in the range 0.5 mA to
9 mA. T his will satisfy the AD7225 I
SS
requirement over the
commercial operating temperature range.
1/6
CD4049AE
1/6
CD4049AE
1/6
CD4049AE
1/6
CD4049AE
1N4001
510
1/6
CD4049AE
5.1k
1/6
CD4049AE
510k
+
+
–V
OUT
5V1
47
μ
F
1N4001
47
μ
F
0.02
μ
F
Figure 26. V
SS
Generation Circuit
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