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參數(shù)資料
| 型號： | AD7225LR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | LC2MOS Quad 8-Bit DAC with Separate Reference Inputs |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24 |
| 封裝： | ROHS COMPLIANT, MS-013AD, SOIC-24 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 339K |
| 代理商： | AD7225LR |
AD7225
REV. B
–4–
ABSOLUT E MAX IMUM RAT INGS
1
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +17 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +17 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +24 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
Digital Input Voltage to DGND . . . . . . . –0.3 V, V
DD
+ 0.3 V
V
REF
to AGND . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
+ 0.3 V
V
OUT
to AGND
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
Power Dissipation (Any Package) to +75
°
C . . . . . . . . 500 mW
Derates above 75
°
C by . . . . . . . . . . . . . . . . . . . . . 2.0 mW/
°
C
Operating T emperature
Commercial (K , L Versions) . . . . . . . . . . . –40
°
C to +85
°
C
Industrial (B, C Versions) . . . . . . . . . . . . . –40
°
C to +85
°
C
Extended (T , U Versions) . . . . . . . . . . . . –55
°
C to +125
°
C
Storage T emperature . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 secs) . . . . . . . . . . . +300
°
C
NOT ES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Outputs may be shorted to any voltage in the range V
to V
provided that the
power dissipation of the package is not exceeded. T ypical short circuit current for
a short to AGND or V
SS
is 50 mA.
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7225 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURAT IONS
LC C C
DIP and SOIC
PLC C
T E RMINOLOGY
T OT AL UNADJUST E D E RROR
T otal Unadjusted Error is a comprehensive specification which
includes full-scale error, relative accuracy, and zero code error.
Maximum output voltage is V
REF
– 1 LSB (ideal), where 1 LSB
(ideal) is V
REF
/256. T he LSB size will vary over the V
REF
range.
Hence the zero code error will, relative to the LSB size, increase
as V
REF
decreases. Accordingly, the total unadjusted error,
which includes the zero code error, will also vary in terms of
LSBs over the V
REF
range. As a result, total unadjusted error is
specified for a fixed reference voltage of +10 V.
RE LAT IVE ACCURACY
Relative Accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after al-
lowing for zero code error and full-scale error and is normally
expressed in LSBs or as a percentage of full-scale reading.
DIFFE RE NT IAL NONLINE ARIT Y
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of
±
1 LSB max over
the operating temperature range ensures monotonicity.
DIGIT AL FE E DT HROUGH
Digital Feedthrough is the glitch impulse transferred to the out-
put of the DAC due to a change in its digital input code. It is
specified in nV secs and is measured at V
REF
= 0 V.
DIGIT AL CROSST ALK
Digital Crosstalk is the glitch impulse transferred to the output
of one converter (not addressed) due to a change in the digital
input code to another addressed converter. It is specified in
nV secs and is measured at V
REF
= 0 V.
AC FE E DT HROUGH
AC Feedthrough is the proportion of reference input signal
which appears at the output of a converter when that DAC is
loaded with all 0s.
CHANNE L-T O-CHANNE L ISOLAT ION
Channel-to-channel isolation is the proportion of input signal
from the reference of one DAC (loaded with all 1s) which ap-
pears at the output of one of the other three DACs (loaded with
all 0s) T he figure given is the worst case for the three other out-
puts and is expressed as a ratio in dBs.
FULL-SCALE E RROR
Full-Scale Error is defined as:
Measured Value – Zero Code Error – Ideal Value
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