參數資料
型號: AD7143ACPZ-1500RL7
廠商: Analog Devices Inc
文件頁數: 8/57頁
文件大小: 0K
描述: IC CTLR PROGRAMMABLE CDC 16LFCSP
標準包裝: 1
類型: 電容數字轉換器
輸入類型: 邏輯
輸出類型: 邏輯
接口: I²C
電流 - 電源: 1mA
安裝類型: 表面貼裝
封裝/外殼: 16-VQFN 裸露焊盤,CSP
供應商設備封裝: 16-LFCSP-VQ
包裝: 標準包裝
產品目錄頁面: 781 (CN2011-ZH PDF)
其它名稱: AD7143ACPZ-1500RL7DKR
AD7143
Rev. 0 | Page 15 of 56
STAGE7
STAGE6
STAGE5
STAGE4
STAGE3
STAGE2
STAGE1
STAGE0
SW
IT
C
H
M
A
T
R
IX
Σ-Δ
16-BIT
ADC
CO
NV
E
RS
IO
N
S
E
Q
U
E
N
CE
CIN0
CIN1
CIN2
CIN3
CIN4
CIN5
CIN6
CIN7
06
47
2-
0
21
Figure 23. CDC Conversion Stages
The number of required conversion stages depends completely
on the number of sensors attached to the AD7143. Figure 24
shows how many conversion stages are required for each sensor,
and how many inputs each sensor requires to the AD7143.
BUTTONS
STAGE0
CDC
STAGE0
CDC
+
STAGE1
8-ELEMENT
SLIDER
CDC
+
+
STAGE1
+
CDC
AD7143
SEQUENCER
CDC
STAGE2
+
STAGE3
+
–CDC
CDC
STAGE4
+
STAGE5
+
–CDC
CDC
STAGE6
+
STAGE7
+
–CDC
AD7143
SEQUENCER
SRC
S2
S3
S1
0
64
72
-02
2
Figure 24. Sequencer Setup for Sensors
A button sensor generally requires one sequencer stage.
However, it is possible to configure two button sensors to
operate differentially for special applications where the user
should not press both buttons simultaneously, such as a with
rocker zoom switch on a digital camera.
In this case, only one button from the pair is activated at a time;
pressing both buttons together activates neither button. This
example is shown in Figure 24 for sensor buttons S2 and S3.
A scroll bar or slider requires eight stages. The result from each
stage is used by the host software to determine the user’s
position on the scroll bar. The algorithm that performs this
process is available from Analog Devices free of charge, upon
signing a software license. Scroll wheels also require eight stages.
CDC CONVERSION SEQUENCE TIME
The time required for one complete measurement for all eight
stages by the CDC is defined as the CDC conversion sequence
time. The SEQUENCE_STAGE_NUM register and
DECIMATION register determine the conversion time as listed
Table 8. CDC Conversion Times for Full Power Mode
Conversion Time (ms)
SEQUENCE_STAGE_NUM
Decimation = 128
Decimation = 256
0
1.525
3.072
1
3.072
6.144
2
4.608
9.216
3
6.144
12.288
4
7.68
15.25
5
9.216
18.432
6
10.752
21.504
7
12.288
24.576
For example, while operating with a decimation rate of 128,
if the SEQUENCE_STAGE_NUM register is set to 5 for the
conversion of six stages in a sequence, the conversion sequence
time is 9.216 ms.
Full Power Mode CDC Conversion Sequence Time
The full power mode CDC conversion sequence time for all
eight stages is set by configuring the SEQUENCE_STAGE_NUM
register and the DECIMATION register as outlined in Table 8.
Figure 25 shows a simplified timing diagram of the full power
CDC conversion time. The full power mode CDC conversion
time tCONV_FP is set using Table 8.
CONVERSION
SEQUENCE N
CONVERSION
SEQUENCE N + 1
CONVERSION
SEQUENCE N + 2
CDC
CONVERSION
tCONV_FP
06
47
2-
0
23
Figure 25. Full Power Mode CDC Conversion Sequence Time
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