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| 型號： | AD6654CBC |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 33/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT W/4CH RSP 256CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 92.16M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 2.5W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -25°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 256-CSPBGA（17x17） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
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AD6654
Rev. 0 | Page 39 of 88
The filter has a maximum input sample rate of 150 MHz and,
when filter is not bypassed, the maximum output rate is
75 MHz.
The filter has a ripple of 0.0012 dB and rejection of 77 dB. For
an alias rejection of 77 dB, the alias-protected bandwidth is 14%
of the filter input sample rate. The bandwidth of the filter for a
ripple of 0.00075 dB is also the same as the alias-protected
bandwidth, due to the nature of half-band filters. The 3 dB
bandwidth of this filter is 44% of the filter input sample rate.
For example, if the sample rate into the filter is 50 MHz, then
the alias-protected bandwidth of the HB1 filter is 7 MHz. If the
bandwidth of the required carrier is greater than 7 MHz, then
HB1 might not be useful.
05156-039
FRACTION OF HB1 INPUT SAMPLE RATE
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
dBc
0
–20
–10
–40
–30
–60
–50
–80
–70
–100
–90
–120
–110
–107
FIR1 + HB1 RESPONSE
0.43
0.57
Figure 50. Composite Response of FIR1 and HB1 Filters to Their Input Rate
6-TAP FIXED COEFFICIENT FILTER (FIR2)
Following the first cascade of the FIR1 and HB1 filters is the
second cascade of the FIR2 and HB2 filters. The 6-tap, fixed
coefficient FIR2 filter is useful in providing extra alias
protection for the decimating HB2 filter in certain filter
configurations. It is a simple sum-of-products FIR filter with
six filter taps and 5-bit fixed coefficients. Note that this filter
does not decimate. The normalized coefficients used in the
implementation and the 5-bit decimal equivalent value of the
coefficients are listed in Table 17.
Table 17. 6-Tap FIR2 Filter Coefficients
Coefficient
Number
Normalized
Coefficient
Decimal Coefficient
(5-Bit)
C0, C5
0.125
2
C1, C4
0.1875
3
C2, C3
0.9375
15
The user can either use or bypass this filter. Writing Logic 0 to
FIR2 enable bit in the FIR-HB control register bypasses this
fixed coefficient filter. The filter is useful only in certain filter
configurations and bypassing it for other applications results in
power savings. The filter is especially useful in increasing the
stop-band attenuation of the HB2 filter that follows. Therefore,
it is optimal to use both FIR2 and HB2 in a configuration.
This filter runs at a sample rate given by one of the following
equations:
fFIR2 = fHB1,
if HB1 is bypassed
fFIR2 =
2
HB1
f
,
if HB1 is not bypassed
where:
fHB1
is the input rate of the HB1 filter.
fFIR2
is the input rate of the FIR2 filter.
The maximum input and output rate for this filter is 75 MHz.
The response of the FIR2 filter is shown in Figure 51.
05156-040
FRACTION OF FIR2 INPUT SAMPLE RATE
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
dBc
0
–8.33
–16.67
–25.00
–33.33
–41.67
–50.00
–58.33
–66.67
–75.00
–83.33
–91.67
–100.00
–30
0.39
FIR2 RESPONSE
0.61
Figure 51. FIR2 Filter Response to the Input Rate of the Filter
DECIMATE-BY-2 HALF-BAND FILTER (HB2)
The second stage of the second cascade of the FIR-HB block is a
decimate-by-2 half-band filter. The 27-tap, symmetric, fixed
coefficient HB2 filter has low power consumption due to its
polyphase implementation. The filter has 20 bits of input and
output data with 12-bit coefficients. The normalized
coefficients used in the implementation and the 10-bit decimal
equivalent value of the coefficients are listed in Table 18. Other
coefficients are 0s.
Table 18. HB2 Filter Fixed Coefficients
Coefficient
Number
Normalized
Coefficient
Decimal Coefficient
(12-Bit)
C1, C27
0.00097656
2
C3, C25
0.00537109
11
C5, C23
0.015
32
C7, C21
0.0380859
78
C9, C19
0.0825195
169
C11, C17
0.1821289
C13, C15
0.6259766
1282
C14
1
2048
Similar to the HB1 filter, this filter can either be used or
bypassed. Writing Logic 0 to the HB1 enable bit in the FIR-HB
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| AD6654CBCZ | 功能描述:IC ADC 14BIT W/4CH RSP 256CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| AD6654XBCZ | 制造商:Analog Devices 功能描述:14-BIT, 92.16 MSPS, 4 & 6-CHANNEL WIDEBAND IF TO BASE BAND R - Bulk |
| AD6655 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Diversity Receiver |
| AD6655-125EBZ | 功能描述:BOARD EVAL W/AD6655 & SOFTWARE RoHS:是 類別:RF/IF 和 RFID >> RF 評估和開發(fā)套件，板 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關(guān)產(chǎn)品:- 已供物品:模塊 其它名稱:SER3796 |
| AD6655-125EBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Diversity Receiver |
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