參數(shù)資料
型號: AD6654BBCZ
廠商: Analog Devices Inc
文件頁數(shù): 28/88頁
文件大?。?/td> 0K
描述: IC ADC 14BIT W/6CH RSP 256CSPBGA
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 92.16M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.5W
電壓電源: 模擬和數(shù)字
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 256-BGA,CSPBGA
供應(yīng)商設(shè)備封裝: 256-CSPBGA(17x17)
包裝: 托盤
輸入數(shù)目和類型: 1 個差分,單極
AD6654
Rev. 0 | Page 34 of 88
NUMERICALLY CONTROLLED OSCILLATOR (NCO)
Each channel consists of an independent complex NCO and a
complex mixer. This processing stage is comprised of a digital
tuner consisting of three multipliers and a 32-bit complex NCO.
The NCO serves as a quadrature local oscillator capable of
producing an NCO frequency of between –CLK/2 and +CLK/2
with a resolution of CLK/232 in the complex mode, where CLK
is the input clock frequency.
The frequency word used for generating the NCO is a 32-bit
word. This word is used to generate a 20-bit phase word. A
16-bit phase offset word is added to this phase word. 18 bits of
this phase word are used to generate the sine and cosine of the
required NCO frequency. The amplitude of the sine and cosine
are represented using 17 bits. The worst-case spurious signal
from the NCO is better than 100 dBc for all output
frequencies.
Because all the filtering in the AD6654 is low-pass filtering, the
carrier of interest is tuned down to dc (frequency = 0 Hz). This
is illustrated in Figure 47. Once the signal of interest is tuned
down to dc, the unwanted adjacent carriers can be rejected
using the low-pass filtering that follows.
NCO FREQUENCY
The NCO frequency value is given by the 32-bit twos comple-
ment number entered in the NCO frequency register.
Frequencies between CLK/2 and +CLK/2 (with +CLK/2
excluded) are represented using this frequency word:
0x8000 0000 represents a frequency given by CLK/2.
0x0000 0000 represents dc (frequency is 0 Hz).
0x7FFF FFFF represents CLK/2 CLK/232.
The NCO frequency word can be calculated using following the
equation:
(
)
CLK
CH
f
FREQ
NCO
,
mod
2
_
32
=
where:
NCO_FREQ
is the 32-bit twos complement number represent-
ing the NCO frequency register.
fCH
is the desired carrier frequency.
fCLK
is the clock rate for the channel under consideration.
mod( ) is a remainder function. For example, mod(110, 100) =
10 and, for negative numbers, mod(32, 10) = 2.
Note that this equation applies to the aliasing of signals in the
digital domain (that is, aliasing introduced when digitizing
analog signals).
For example, if the carrier frequency is 100 MHz and the clock
frequency is 80 MHz,
(
)
25
.
0
80
20
,
mod
=
CLK
DK
CH
f
This, in turn, converts to 0x4000 0000 in the 32-bit twos
complement representation for NCO_FREQ.
05156-036
NCO TUNES SIGNAL TO
SIGNAL OF INTEREST
AFTER FREQUENCY TRANSLATION
SIGNAL OF INTEREST
SIGNAL OF INTEREST IMAGE
–fs/2
–7fs/16
–3fs/8
–5fs/16
–fs/4
–3fs/16
–fs/8
–fs/16
DC
fs/16
fs/8
3fs/16
fs/4
5fs/16
3fs/8
7fs/16
fs/2
–fs/2
–7fs/16
–3fs/8
–5fs/16
–fs/4
–3fs/16
–fs/8
–fs/16
DC
fs/16
fs/8
3fs/16
fs/4
5fs/16
3fs/8
7fs/16
fs/2
FREQUENCY TRANSLATION (SINGLE 1MHz CHANNEL TUNED TO BASEBAND)
WIDEBAND INPUT SPECTRUM (30MHz FROM HIGH SPEED ADC)
WIDEBAND INPUT SPECTRUM (–fsample/2 TO +fsample/2)
Figure 47. Frequency Translation Principle Using the NCO and Mixer
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