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參數(shù)資料
| 型號： | AD6652BC |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit, 65 MSPS IF to Baseband Diversity Receiver |
| 中文描述： | 12位，65 MSPS的IF到基帶分集接收機 |
| 文件頁數(shù)： | 27/76頁 |
| 文件大?。?/td> | 1839K |
| 代理商： | AD6652BC |
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AD6652
External Reference Operation
An external reference voltage can be used to enhance the gain
accuracy of the ADC or improve thermal drift characteristics.
When multiple ADCs track one another, a single reference
(internal or external) might be necessary to reduce gain-
matching errors to an acceptable level. A high-precision
external reference can also be selected to provide lower gain and
offset temperature drift.
Rev. 0 | Page 27 of 76
When the SENSE pin is tied to AVDD as in Figure 42, the
internal reference is disabled, allowing the use of an external
reference. An internal reference buffer loads the external
reference with an equivalent 7 k load. The internal buffer still
generates the positive and negative full-scale references, REFT
and REFB, for the ADC core. The input span is always twice the
value of the reference voltage; therefore, the external reference
must be limited to a maximum of 1 V.
If the internal reference of the AD6652
s, the loading on VREF by the other converters must be
onsidered. Figure 44 shows how the internal reference voltage
is affected by loading.
0
0.2
0.4
0.6
0.8
1.0
1.2
V
R
–40 –30 –20 –10
0
20
60
10
30
40
50
70
80
90
TEMPERATURE (°C)
0
V
REF
= 1V
V
REF
= 0.5V
Figure 43. Typical VREF Drift
–0.25
–0.20
–0.15
is used to drive multiple
IC
c
0
VINA+
VINA–
VREF
0.5V TO 1.0V
EXTERNAL
REFERENCE IN
VREF
SENSE
+3.0V
TO CH B
REF AMP
SELECT
LOGIC
REF
AMP A
CH A
ADC
CORE
REFT_A
REFB_A
0.5V
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
10
μ
F
10
μ
F
R
INT
R
INT
Figure 42. External Reference Operation with Connections
Shown for Channel A Only
–0.10
R
E
–0.05
0.05
1.0
1.5
0
0.5
2.0
2.5
3.0
LOAD (mA)
0
0
1V ERROR
0.5V ERROR
Figure 44. VREF Accuracy vs. Load
Shared Reference Mode
The shared reference mode allows the user to connect the
references from the dual ADCs together for superior gain and
offset matching performance. If the ADCs are to function
independently, the reference decoupling should be treated
independently and can provide superior isolation between the
dual ADC channels. To enable shared reference mode, the
SHRDREF pin must be tied high and the differential references
must be externally shorted together, that is, REFTA must be
shorted externally to REFTB and REFBA must be shorted
externally to REFBB.
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PDF描述 |
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| AD6652PCB | 12-Bit, 65 MSPS IF to Baseband Diversity Receiver |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD6652BC/PCB | 制造商:Analog Devices 功能描述:Evaluation Board With AD6652 And Software |
| AD6652BC/PCBZ | 制造商:Analog Devices 功能描述:DUAL CHANNEL ADC WITH QUAD CHA 制造商:Analog Devices 功能描述:DUAL CHANNEL ADC WITH QUAD CHANNEL RSP - Bulk |
| AD6652PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 65 MSPS IF to Baseband Diversity Receiver |
| AD6652XBC | 制造商:Analog Devices 功能描述:- Bulk |
| AD6653 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Diversity Receiver |
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