參數(shù)資料
型號： AD6623ABC
廠商： ANALOG DEVICES INC
元件分類： 通信及網(wǎng)絡
英文描述： 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA196
封裝： CSPBGA-196
文件頁數(shù)： 6/40頁
文件大小： 381K
代理商： AD6623ABC
REV. 0
–6–
AD6623
MICROPROCESSOR PORT TIMING CHARACTERISTICS
1, 2
Test
Level
AD6623AS
Typ
Parameter (Conditions)
Temp
Min
Max
Unit
MICROPROCESSOR PORT, MODE INM (MODE = 0)
MODE INM Write Timing
:
t
SC
t
HC
t
HWR
t
SAM
t
HAM
t
DRDY
t
ACC
MODE INM Read Timing
:
t
SC
t
HC
t
SAM
t
HAM
t
ZOZ
t
DD
t
DRDY
t
ACC
MICROPROCESSOR PORT, MOTOROLA (MODE = 1)
Control
3
to
↑
CLK Setup Time
Control
3
to
↑
CLK Hold Time
WR(
RW
)
to RDY(
DTACK
) Hold Time
Address/Data to
WR
(RW) Setup Time
Address/Data to RDY(
DTACK
) Hold Time
WR
(RW) to RDY(
DTACK
) Delay
WR
(RW) to RDY(
DTACK
) High Delay
Full
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
IV
4.5
2.0
8.0
3.0
2.0
4.0
4
×
t
CLK
ns
ns
ns
ns
ns
ns
ns
5
×
t
CLK
9
×
t
CLK
Control
3
to
↑
CLK Setup Time
Control
3
to
↑
CLK Hold Time
Address to
RD
(
DS
) Setup Time
Address to Data Hold Time
Data Three-State Delay
RDY(
DTACK
) to Data Delay
RD
(
DS
) to RDY(
DTACK
) Delay
RD
(
DS
) to RDY(
DTACK
) High Delay
Full
Full
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
IV
IV
4.5
2.0
3.0
2.0
ns
ns
ns
ns
ns
ns
ns
ns
4.0
8
×
t
CLK
10
×
t
CLK
13
×
t
CLK
MODE MNM Write Timing
:
t
SC
t
HC
t
HDS
t
HRW
t
SAM
t
HAM
t
DDTACK
t
ACC
MODE MNM Read Timing:
t
SC
t
HC
t
HDS
t
SAM
t
HAM
t
ZD
t
DD
t
DDTACK
t
ACC
NOTES
1
All Timing Specifications valid over VDD range of 2.375 V to 2.675 V and VDDIO range of 3.0 V to 3.6 V.
2
C
LOAD
= 40 pF on all outputs (unless otherwise specified).
3
Specification pertains to control signals: RW, (
WR
),
DS
, (
RD
),
CS
.
Specifications subject to change without notice.
Control
3
to
↑
CLK Setup Time
Control
3
to
↑
CLK Hold Time
DS
(
RD
) to
DTACK
(RDY) Hold Time
RW(
WR
) to
DTACK
(RDY) Hold Time
Address/Data to RW(
WR
) Setup Time
Address/Data to RW(
WR
) Hold Time
DS
(
RD
) to
DTACK
(RDY) Delay
RW(
WR
) to
DTACK
(RDY) Low Delay
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
4.5
2.0
8.0
8.0
3.0
2.0
ns
ns
ns
ns
ns
ns
ns
ns
Full
IV
4
×
t
CLK
5
×
t
CLK
9
×
t
CLK
Control
3
to
↑
CLK Setup Time
Control
3
to
↑
CLK Hold Time
DS
(
RD
) to
DTACK
(RDY) Hold Time
Address to
DS
(
RD
) Setup Time
Address to Data Hold Time
Data Three-State Delay
DTACK
(RDY) to Data Delay
DS
(
RD
) to
DTACK
(RDY) Delay
DS
(
RD
) to
DTACK
(RDY) Low Delay
Full
Full
Full
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
IV
IV
IV
4.0
2.0
8.0
3.0
2.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
8
×
t
CLK
10
×
t
CLK
13
×
t
CLK
相關(guān)PDF資料
PDF描述
AD6623AS 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
AD6623PCB 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
AD6624AS Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP)
AD6624A Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP)
AD6624AABC Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD6623ABCZ 制造商:Analog Devices 功能描述:Signal Processor 196-Pin CSP-BGA
AD6623AS 制造商:Analog Devices 功能描述:Signal Processor 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:4 CHANNEL, 104 MSPS DIGITAL TSP - Bulk
AD6623ASZ 功能描述:IC TSP 4CHAN 104MSPS 128MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1
AD6623BC/PCB 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
AD6623PCB 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
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