參數(shù)資料
型號: AD5663BRMZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 13/24頁
文件大?。?/td> 0K
描述: IC DAC 16BIT DUAL 10-MSOP
產品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
系列: nanoDAC™
設置時間: 4µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 2.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-MSOP
包裝: 標準包裝
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): 220k
其它名稱: AD5663BRMZ-REEL7DKR
AD5663
Rev. 0 | Page 20 of 24
BIPOLAR OPERATION USING THE AD5663
The AD5663 has been designed for single-supply operation,
but a bipolar output range is also possible using the circuit in
Figure 37. The circuit gives an output voltage range of ±5 V.
Rail-to-rail operation at the amplifier output is achievable using
an AD820 or an OP295 as the output amplifier.
The output voltage for any input code can be calculated as
×
+
×
×
=
R1
R2
V
R1
R2
R1
D
V
DD
O
536
,
65
where D represents the input code in decimal (0 to 65,535).
With VDD = 5 V, R1 = R2 = 10 kΩ
V
5
536
,
65
10
×
=
D
VO
This is an output voltage range of ±5 V, with 0x0000 corre-
sponding to a 5 V output, and 0xFFFF corresponding to a
+5 V output.
THREE-WIRE
SERIAL
INTERFACE
R2 = 10k
+5V
–5V
AD820/
OP295
+5V
AD5663
VDD
VOUT
R1 = 10k
±5V
0.1F
10F
05
85
5-
0
42
Figure 37. Bipolar Operation with the AD5663
USING THE AD5663 WITH
A GALVANICALLY ISOLATED INTERFACE
In process control applications in industrial environments, it
is often necessary to use a galvanically isolated interface to
protect and isolate the controlling circuitry from any hazardous
common-mode voltages that can occur in the area where the
DAC is functioning. iCoupler provides isolation in excess of
2.5 kV. The AD5663 use a 3-wire serial logic interface, so the
ADuM1300 three-channel digital isolator provides the required
isolation (see Figure 38). The power supply to the part also
needs to be isolated, which is done by using a transformer. On
the DAC side of the transformer, a 5 V regulator provides the
5 V supply required for the AD5663.
0.1F
5V
REGULATOR
GND
DIN
SYNC
SCLK
POWER
10F
SDI
SCLK
DATA
AD5663
VOUT
VOB
VOA
VOC
VDD
VIC
VIB
VIA
ADuM1300
05
85
5-
0
43
Figure 38. AD5663 with a Galvanically Isolated Interface
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, it is helpful to carefully
consider the power supply and ground return layout on the
board. The printed circuit board containing the AD5663 should
have separate analog and digital sections, each having its own
area of the board. If the AD5663 is in a system where other
devices require an AGND-to-DGND connection, the connection
should be made at one point only. This ground point should be
as close as possible to the AD5663.
The power supply to the AD5663 should be bypassed with 10 μF
and 0.1 μF capacitors. The capacitors should be located as close
as possible to the device, with the 0.1 μF capacitor ideally right
up against the device. The 10 μF capacitors are of the tantalum
bead type. It is important that the 0.1 μF capacitor have low
effective series resistance (ESR) and effective series inductance
(ESI) as in, for example, common ceramic types of capacitors.
This 0.1 μF capacitor provides a low impedance path to ground
for high frequencies caused by transient currents due to internal
logic switching.
The power supply line itself should have as large a trace as
possible to provide a low impedance path and to reduce glitch
effects on the supply line. Clocks and other fast switching
digital signals should be shielded from other parts of the board
by digital ground. Avoid crossover of digital and analog signals
if possible. When traces cross on opposite sides of the board,
ensure that they run at right angles to each other to reduce
feedthrough effects through the board. The best board layout
technique is the microstrip technique, where the component
side of the board is dedicated to the ground plane only, and the
signal traces are placed on the solder side. However, this is not
always possible with a 2-layer board.
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