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參數(shù)資料
| 型號： | AD5601 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package |
| 中文描述： | 2.7 V至5.5 V，“100聯(lián)合航空，8-/10-/12-Bit nanoDAC系列的D / A，SPI接口，SC70封裝 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 599K |
| 代理商： | AD5601 |
Preliminary Technical Data
AD5601/AD5611/AD5621
AD5601/AD5611/AD5621 to 68HC11/68L11 Interface
Figure 30 shows a serial interface between the AD5601/
AD5611/AD5621 and the 68HC11/68L11 microcontrollers.
SCK of the 68HC11/68L11 drives the SCLK of the AD5601/
AD5611/AD5621, while the MOSI output drives the serial data
line of the DAC. The SYNC signal is derived from a port line
(PC7). The setup conditions for correct operation of this
interface are as follows: the 68HC11/68L11 should be
configured so that its CPOL bit is a 0 and its CPHA bit is a 1.
When data is being transmitted to the DAC, the SYNC line is
taken low (PC7). When the 68HC11/68L11 is configured as
above, data appearing on the MOSI output is valid on the falling
edge of SCK. Serial data from the 68HC11/68L11 is transmitted
in 8-bit bytes with only eight falling clock edges occurring in
the transmit cycle. Data is transmitted MSB first. To load data to
the AD5601/AD5611/AD5621, PC7 is left low after the first
eight bits are transferred, and a second serial write operation is
performed to the DAC. PC7 is taken high at the end of this
procedure.
Rev. PrC | Page 15 of 20
68HC11/
68L11
AD5601/AD5611/
AD5621*
*ADDITIONAL PINS OMITTED FOR CLAIRTY
PC7
SCK
MOSI
SYNC
SCLK
DIN
0
Figure 30. AD5601/AD5611/AD5621 to 68HC11/68L11 Interface
AD5601/AD5611/AD5621 to Blackfin ADSP-BF53X
Interface
Figure 31 shows a serial interface between the AD5601/
AD5611/AD5621 and the Blackfin ADSP-BF53x
microprocessors. The ADSP-BF53x processor family
incorporates two dual-channel synchronous serial ports,
SPORT1 and SPORT0, for serial and multiprocessor
communications. Using SPORT0 to connect to the AD5601/
AD5611/AD5621, the setup for the interface is as follows:
DT0PRI drives the SDIN pin of the AD5601/AD5611/AD5621,
while TSCLK0 drives the SCLK of the part. The SYNC is driven
from TFS0.
ADSP-BF53X
AD5601/AD5611/
AD5621
*ADDITIONAL PINS OMITTED FOR CLAIRTY
DT0PRI
TSCLK0
TFS0
DIN
SCLK
SYNC
0
Figure 31. AD5601/AD5611/AD5621 to Blackfin ADSP-BF53X Interface
AD5601/AD5611/AD5621 to 80C51/80L51 Interface
Figure 32 shows a serial interface between the AD5601/
AD5611/AD5621 and the 80C51/80L51 microcontroller. The
setup for the interface is as follows: TXD of the 80C51/80L51
drives SCLK of the AD5601/AD5611/AD5621, while RXD
drives the serial data line of the part. The SYNC signal is again
derived from a bit programmable pin on the port. In this case,
port line P3.3 is used. When data is to be transmitted to the
AD5601/AD5611/AD5621, P3.3 is taken low. The 80C51/80L51
transmit data only in 8-bit bytes; thus, only eight falling clock
edges occur in the transmit cycle. To load data to the DAC, P3.3
is left low after the first eight bits are transmitted, and a second
write cycle is initiated to transmit the second byte of data. P3.3
is taken high following the completion of this cycle. The 80C51/
80L51 output the serial data in a format that has the LSB first.
The AD5601/AD5611/AD5621 require their data with the MSB
as the first bit received. The 80C51/80L51 transmit routine
should take this into account.
80C51/80L51*
AD5601/AD5611/
AD5621*
*ADDITIONAL PINS OMITTED FOR CLAIRTY
P3.3
TXD
RXD
SYNC
SCLK
DIN
0
Figure 32. AD5601/AD5611/AD5621 to 80C51/80L51 Interface
AD5601/AD5611/AD5621 to MICROWIRE Interface
Figure 33 shows an interface between the AD5601/AD5611/
AD5621 and any MICROWIRE compatible device. Serial data is
shifted out on the falling edge of the serial clock and is clocked
into the AD5601/AD5611/AD5621 on the rising edge of the SK.
MICROWIRE*
AD5601/AD5611/
AD5621*
*ADDITIONAL PINS OMITTED FOR CLAIRTY
CS
SK
SO
SYNC
SCLK
DIN
0
Figure 33. AD5601/AD5611/AD5621 to MICROWIRE Interface
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD5611 | 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package |
| AD5611AKS | 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package |
| AD5621 | 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package |
| AD5621AKS | 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package |
| AD5601BKS | 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5601_13 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.7 V to 5.5 V, <100 ??A, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70 |
| AD5601BCPZ | 制造商:Analog Devices 功能描述:DAC 8BIT +/-0.5LSB 5.5VIN 6LFCSP 制造商:Analog Devices 功能描述:DAC, 8BIT, +/-0.5LSB, 5.5VIN, 6LFCSP |
| AD5601BCPZ-RL7 | 功能描述:IC DAC 8BIT SPI 6LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:nanoDAC™ 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 設(shè)計(jì)資源:Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139) 標(biāo)準(zhǔn)包裝:10,000 系列:- 設(shè)置時(shí)間:- 位數(shù):12 數(shù)據(jù)接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 薄型，TSOT-23-8 供應(yīng)商設(shè)備封裝:TSOT-23-8 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:2.7M |
| AD5601BKS | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package |
| AD5601BKSZ-500RL7 | 功能描述:IC DAC 8BIT BUFF V-OUT SC70-6 RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:nanoDAC™ 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 設(shè)計(jì)資源:Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139) 標(biāo)準(zhǔn)包裝:10,000 系列:- 設(shè)置時(shí)間:- 位數(shù):12 數(shù)據(jù)接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 薄型，TSOT-23-8 供應(yīng)商設(shè)備封裝:TSOT-23-8 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:2.7M |
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