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參數(shù)資料
| 型號： | AD5555CRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Dual, Current-Output, Serial-Input, 16-/14-Bit DAC |
| 中文描述： | SERIAL INPUT LOADING, 0.5 us SETTLING TIME, 14-BIT DAC, PDSO16 |
| 封裝： | MO-153AB, TSSOP-16 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 1419K |
| 代理商： | AD5555CRU |
AD5545/AD5555
Table 8 shows that each DAC A and DAC B can be individually
loaded with a new data value. In addition, a common new data
value can be loaded into both DACs simultaneously by setting Bit
A1 = A0 = high. This command enables the parallel combination
of both DACs, with I
OUT
A and I
OUT
B tied together, to act as one
DAC with significant improved noise performance.
ESD Protection Circuits
All logic input pins contain back-biased ESD protection Zeners
connected to digital ground (DGND) and V
DD
as shown in
Figure 18.
Rev. 0 | Page 12 of 16
LAYOUT AND POWER SUPPLY BYPASSING
It is a good practice to employ compact, minimum lead length
layout design. The input leads should be as direct as possible
with a minimum conductor length. Ground paths should have
low resistance and low inductance.
Similarly, it is also good practice to bypass the power supplies
with quality capacitors for optimum stability. Supply leads to the
device should be bypassed with 0.01 μF to 0.1 μF disc or chip
ceramic capacitors. Low ESR 1 μF to 10 μF tantalum or electro-
lytic capacitors should also be applied at V
DD
to minimize any
transient disturbance and to filter any low frequency ripple
(see Figure 19). Users should not apply switching regulators for
V
DD
due to the power supply rejection ratio degradation over
frequency.
V
DD
02918-0-007
5k
DGND
DIGITAL
INPUTS
AD5545/
AD5555
V
DD
V
DD
A
GND
X
DGND
02918-0-008
C1
+
C2
10
μ
F
0.1
μ
F
Figure 18. Equivalent ESD Protection Circuits
POWER-UP SEQUENCE
It is recommended to power-up V
DD
and ground prior to any
reference voltages. The ideal power-up sequence is A
GND
X,
DGND, V
DD
, V
REF
X, and digital inputs. A noncompliance power-
up sequence can elevate reference current, but the device will
resume normal operation once V
DD
is powered.
Figure 19. Power Supply Bypassing and Grounding Connection
GROUNDING
The DGND and A
GND
X pins of the AD5545/AD5555 refer to the
digital and analog ground references. To minimize the digital
ground bounce, the DGND terminal should be joined remotely
at a single point to the analog ground plane (see Figure 19).
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