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參數(shù)資料
型號: AD5535ABCZ
廠商: Analog Devices Inc
文件頁數(shù): 15/16頁
文件大?。?/td> 0K
描述: IC DAC 14BIT 32CHAN 124CSPBGA
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 65µs
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 32
電壓電源: 模擬和數(shù)字
功率耗散(最大): 594mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 124-LBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 124-CSPBGA(15x15)
包裝: 托盤
輸出數(shù)目和類型: 32 電壓,單極
采樣率(每秒): 1.2M
配用: EVAL-AD5535EBZ-ND - BOARD EVALUATION FOR AD5535
AD5535
Rev. A | Page 8 of 16
Table 5. Pin Function Descriptions
Mnemonic
Description
AGND
Analog GND Pins.
AVCC
Analog Supply Pins. Voltage range from 4.75 V to 5.25 V.
VPP
Output Amplifier High Voltage Supply. Voltage range from (REF_IN × 50) + 10 V to 225 V.
V+
V+ Amplifier Supply Pins. Voltage range from 4.75 V to 5.25 V.
V
VAmplifier Supply Pins. Voltage range from 4.75 V to 5.25 V.
PGND
Output Amplifier Ground Reference Pins.
DGND
Digital GND Pins.
DVCC
Digital Supply Pins. Voltage range from 2.7 V to 5.25 V.
DAC_GND
Reference GND Supply for All DACs.
REF_IN
Reference Voltage for Channel 0 to Channel 31. Reference input range is 1 V to 4 V and can be used to program the full-
scale output voltage from 50 V to 200 V.
VOUT0 to VOUT31
Analog Output Voltages from the 32 Channels.
ANODE
Anode of Internal Diode for Diode Temperature Measurement.
CATHODE
Cathode of Internal Diode for Diode Temperature Measurement.
SYNC
Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is transferred in
upon the falling edge of SCLK.
Serial Clock Input. Data is clocked into the shift register upon the falling edge of SCLK. This operates at clock speeds of up
to 30 MHz.
Serial Data Input. Data must be valid upon the falling edge of SCLK.
TEST
Allows the same data to be simultaneously loaded to all channels of the AD5535. This pin is used for calibration purposes
when loading zero scale and full scale to all channels. To invoke this feature, bring the TEST pin high. In normal operation,
TEST should be tied low.
RESET1
Active Low Input. This pin can also be used to reset the complete device to its power-on reset conditions. Zero code is
loaded to the DACs.
NC
No connect pins. The user should not connect any signals to these pins.
1 Internal pull-up device on logic input; therefore, it can be left floating and defaults to a logic high condition.
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