參數(shù)資料
型號(hào): AD5530BRUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 2/20頁(yè)
文件大小: 0K
描述: IC DAC 12BIT SRL IN/VOUT 16TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 96
設(shè)置時(shí)間: 20µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 60mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,雙極
采樣率(每秒): 50k
產(chǎn)品目錄頁(yè)面: 782 (CN2011-ZH PDF)
AD5530/AD5531
Rev. B | Page 10 of 20
3
2
1
–3
–2
–1
0
2.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
E
RRO
R
(
L
S
B
)
REFIN VOLTAGE (V)
00
93
8-
0
11
VDD = +15V
VSS = –15V
REFIN = 0V
TA = 25°C
NEGATIVE INL
POSITIVE INL
0.03
0.02
0.01
0
10
17
16
15
14
13
12
11
+85°C
+25°C
–40°C
I DD
(m
A
)
SUPPLY VOLTAGE (V)
00
93
8-
0
14
Figure 11. AD5531 Typical INL Error vs. Reference Voltage
Figure 14. IDD in Power-Down vs. Supply
0
–2.5
–2.0
–1.5
–1.0
–0.5
–40
–20
0
20
40
60
80
E
RRO
R
(
L
S
B
)
TEMPERATURE (°C)
00
93
8-
0
12
VDD = +15V
VSS = –15V
REFIN = +5V
REFAGND = 0V
12
8
4
0
–4
–8
–12
0
5
10
15
20
25
V
OU
T
(V
)
TIME (s)
00
93
8-
0
15
VDD = +15V
VSS = –15V
REFIN = +5V
REFAGND = 0V
TA = 25°C
Figure 12. Typical Full-Scale and Offset Error vs. Temperature
Figure 15. Settling Time
1.50
1.45
1.40
1.35
1.30
1.25
1.20
10
17
16
15
14
13
12
11
+85°C
+25°C
–40°C
CUR
RE
NT
(
m
A)
VDD/VSS (V)
00
93
8-
01
3
0
–0.16
–0.14
–0.12
–0.10
–0.08
–0.06
–0.04
–0.02
V
OU
T
(V
)
TIME (750ns/DIV)
00
93
8-
0
16
VDD = +15V
VSS = –15V
REFIN = +5V
REFAGND = 0V
TA = 25°C
Figure 13. IDD vs. VDD/VSS
Figure 16. Typical Digital-to-Analog Glitch Impulse
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