VDD = 2.5 V to 5." />
參數(shù)資料
型號： AD5432YRMZ
廠商： Analog Devices Inc
文件頁數(shù)： 20/25頁
文件大小： 0K
描述： IC DAC 10BIT MULTIPLYING 10-MSOP
產(chǎn)品培訓模塊： Data Converter Fundamentals
DAC Architectures
設(shè)計資源： Unipolar, Precision DC Digital-to-Analog Conversion Using AD5426/32/43 8-Bit to12-Bit DACs (CN0034)
Precision, Bipolar Configuration for the AD5426/32/43 8-Bit to12-Bit DACs (CN0036)
AC Signal Processing Using AD5426/32/43 Current Output DACs (CN0037)
Programmable Gain Element Using AD5426/32/43 Current Output DACs (CN0038)
標準包裝： 50
位數(shù)： 10
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應商設(shè)備封裝： 10-MSOP
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 2.5M
產(chǎn)品目錄頁面： 782 (CN2011-ZH PDF)
Data Sheet
AD5426/AD5432/AD5443
Rev. G | Page 3 of 24
SPECIFICATIONS
VDD = 2.5 V to 5.5 V, VREF = 10 V, IOUT2 = 0 V; temperature range for Y version: 40°C to +125°C; all specifications TMIN to TMAX, unless
otherwise noted; dc performance measured with OP177; ac performance with AD8038, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
8
Bits
Relative Accuracy
±0.25
LSB
Differential Nonlinearity
±0.5
LSB
Guaranteed monotonic
Resolution
10
Bits
Relative Accuracy
±0.5
LSB
Differential Nonlinearity
±1
LSB
Guaranteed monotonic
Resolution
12
Bits
Relative Accuracy
±1
LSB
Differential Nonlinearity
1/+2
LSB
Guaranteed monotonic
Gain Error
±10
mV
Gain Error Temperature Coefficient1
±5
ppm FSR/°C
Output Leakage Current
±10
nA
Data = 0x0000, TA = 25°C, IOUT1
±20
nA
Data = 0x0000, T = 40°C to 125°C, IOUT1
REFERENCE INPUT1
Reference Input Range
±10
V
VREF Input Resistance
8
10
12
k
Input resistance TC = 50 ppm/°C
RFB Resistance
8
10
12
k
Input resistance TC = 50 ppm/°C
Input Capacitance
Code Zero Scale
3
6
pF
Code Full Scale
5
8
pF
DIGITAL INPUT/OUTPUT1
Input High Voltage, VIH
1.7
V
Input Low Voltage, VIL
0.6
V
Output High Voltage, VOH
VDD 1
V
VDD = 4.5 V to 5 V, ISOURCE = 200 A
VDD 0.5
V
VDD = 2.5 V to 3.6 V, ISOURCE = 200 A
Output Low Voltage, VOL
0.4
V
VDD = 4.5 V to 5 V, ISINK = 200 A
0.4
V
VDD = 2.5 V to 3.6 V, ISINK = 200 A
Input Leakage Current, IIL
1
A
Input Capacitance
4
10
pF
DYNAMIC PERFORMANCE1
Reference Multiplying Bandwidth
10
MHz
VREF = ±3.5 V; DAC loaded all 1s
Output Voltage Settling Time
VREF = 10 V; RLOAD = 100 , DAC latch alternately
loaded with 0s and 1s
Measured to ±16 mV of FS
50
100
ns
Measured to ±4 mV of FS
55
110
ns
Measured to ±1 mV of FS
90
160
ns
Digital Delay
40
75
ns
Interface delay time
10% to 90% Rise/Fall Time
15
30
ns
Rise and fall time, VREF = 10 V, RLOAD = 100
Digital-to-Analog Glitch Impulse
2
nV-s
1 LSB change around major carry, VREF = 0 V
Multiplying Feedthrough Error
DAC latch loaded with all 0s, VREF = ±3.5
70
dB
1 MHz
48
dB
10 MHz
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