AVDD = 10.8 V to 26.4 V," />
參數(shù)資料
型號(hào): AD5420AREZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 27/32頁(yè)
文件大?。?/td> 0K
描述: IC DAC 16BIT 1CH SER 24TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計(jì)資源: Simplified 16-Bit, 4 mA-to-20 mA Output Solution Using AD5420 (CN0098)
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時(shí)間: 10µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 950mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm)裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 24-TSSOP 裸露焊盤(pán)
包裝: 帶卷 (TR)
輸出數(shù)目和類(lèi)型: 1 電流,單極
采樣率(每秒): *
AD5410/AD5420
Data Sheet
Rev. F | Page 4 of 32
SPECIFICATIONS
AVDD = 10.8 V to 26.4 V, GND = 0 V, REFIN = 5 V external; DVCC = 2.7 V to 5.5 V, RLOAD = 300 ; all specifications TMIN to TMAX,
unless otherwise noted.
Table 1.
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments
OUTPUT CURRENT RANGES
0
24
mA
0
20
mA
4
20
mA
ACCURACY, INTERNAL RSET
Resolution
16
Bits
12
Bits
Total Unadjusted Error (TUE)
0.3
+0.3
% FSR
0.13
±0.08
+0.13
% FSR
AD5420, TA = 25°C
0.5
+0.5
% FSR
0.3
±0.15
+0.3
% FSR
AD5410, TA = 25°C
Relative Accuracy (INL)2
0.024
+0.024
% FSR
0.032
+0.032
% FSR
Differential Nonlinearity (DNL)
1
+1
LSB
Guaranteed monotonic
Offset Error
0.27
+0.27
% FSR
0.12
±0.08
+0.12
% FSR
TA = 25°C
Offset Error Temperature Coefficient (TC)3
±16
ppm FSR/°C
Gain Error
0.18
+0.18
% FSR
0.03
±0.006
+0.03
% FSR
AD5420, TA = 25°C
0.22
+0.22
0.06
±0.012
+0.06
AD5410, TA = 25°C
Gain Error Temperature Coefficient (TC)3
±10
ppm FSR/°C
Full-Scale Error
0.2
+0.2
% FSR
0.1
±0.08
+0.1
% FSR
TA = 25°C
Full-Scale Error Temperature Coefficient (TC)3
±12
ppm FSR/°C
ACCURACY, EXTERNAL RSET
Assumes an ideal 15 kΩ resistor
Resolution
16
Bits
12
Bits
Total Unadjusted Error (TUE)
0.15
+0.15
% FSR
0.06
±0.01
+0.06
% FSR
AD5420, TA = 25°C
0.3
+0.3
% FSR
0.1
±0.02
+0.1
% FSR
AD5410, TA = 25°C
Relative Accuracy (INL)2
0.012
+0.012
% FSR
0.032
+0.032
% FSR
Differential Nonlinearity (DNL)
1
+1
LSB
Guaranteed monotonic
Offset Error
0.1
+0.1
% FSR
0.03
±0.006
+0.03
% FSR
TA = 25°C
Offset Error Temperature Coefficient (TC)3
±3
ppm FSR/°C
Gain Error
0.08
+0.08
% FSR
0.05
±0.003
+0.05
% FSR
TA = 25°C
Gain Error Temperature Coefficient (TC)3
±4
ppm FSR/°C
Full-Scale Error
0.15
+0.15
% FSR
0.06
±0.01
+0.06
% FSR
TA = 25°C
Full-Scale Error Temperature Coefficient (TC)3
±7
ppm FSR/°C
OUTPUT CHARACTERISTICS3
Current Loop Compliance Voltage
0
AVDD 2.5
V
Output Current Drift vs. Time
50
ppm FSR
Internal RSET, drift after 1000 hours at 125°C
20
ppm FSR
External RSET, drift after 1000 hours at 125°C
Resistive Load
1200
Ω
Inductive Load
50
mH
TA = 25°C
DC Power Supply Rejection Ratio (PSRR)
1
A/V
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