DV
參數(shù)資料
型號(hào)： AD5412ACPZ-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 4/44頁
文件大小： 0K
描述： IC DAC 12BIT SER 40-LFCSP
設(shè)計(jì)資源： Simplified 12-Bit Voltage and 4 mA-to-20 mA Output Solution Using AD5412 (CN0097)
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 25µs
位數(shù)： 12
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字，雙 ±
功率耗散（最大）： 128mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 40-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 40-LFCSP-VQ（6x6）
包裝： 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型： 1 電流，單極；1 電流，雙極；1 電壓，單極；1 電壓，雙極
采樣率（每秒）： 40k
產(chǎn)品目錄頁面： 782 (CN2011-ZH PDF)
其它名稱： AD5412ACPZ-REEL7DKR
AD5412/AD5422
Data Sheet
Rev. I | Page 12 of 44
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
10
12
11
DVCC
FAULT
GND
LATCH
CLEAR
CLEAR SELECT
AVSS
SCLK
SDIN
GND
SDO
20
21
22
23
24
19
18
17
16
15
14
13
–VSENSE
+VSENSE
VOUT
NC
NOTES
1. NC = NO CONNECT
2. THE PADDLE CAN BE CONNECTED TO 0V IF THE OUTPUT VOLTAGE RANGE
IS UNIPOLAR. THE PADDLE CAN BE LEFT ELECTRICALLY UNCONNECTED
PROVIDED THAT A SUPPLY CONNECTION IS MADE AT THE AVSS PIN. IT IS
RECOMMENDED THAT THE PADDLE BE THERMALLY CONNECTED TO A
COPPER PLANE FOR ENHANCED THERMAL PERFORMANCE.
IOUT
BOOST
CCOMP
DVCC SELECT
RSET
REFOUT
REFIN
AVDD
AD5412/
AD5422
TOP VIEW
(Not to Scale)
06996-
005
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PADDLE CAN BE CONNECTED TO 0V IF THE OUTPUT
VOLTAGE RANGE IS UNIPOLAR. THE EXPOSED PADDLE CAN BE LEFT
ELECTRICALLY UNCONNECTED PROVIDED THAT A SUPPLY CONNECTION
IS MADE AT THE AVSS PIN. IT IS RECOMMENDED THAT THE PADDLE BE
THERMALLY CONNECTED TO A COPPER PLANE FOR ENHANCED
THERMAL PERFORMANCE.
PIN 1
INDICATOR
1
NC
2
FAULT
3
GND
4
CLEAR SELECT
5
CLEAR
6
LATCH
7
SCLK
8
SDIN
9
SDO
10
NC
23 DVCC SELECT
24 CCOMP
25 NC
26 IOUT
27 BOOST
28 CAP1
29 CAP2
30 NC
22 NC
21 NC
1
NC
12
G
ND
13
G
ND
15
G
ND
17
RE
F
O
UT
16
R
SET
18
R
E
FIN
19
NC
20
NC
14
A
V
SS
33
+V
SEN
SE
34
–V
SEN
SE
35
NC
36
A
V
DD
37
A
V
SS
38
NC
39
DV
CC
40
NC
32
V
O
UT
31
NC
TOP VIEW
(Not to Scale)
AD5412/AD5422
06996-
006
Figure 5. TSSOP Pin Configuration
Figure 6. LFCSP Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Description
TSSOP
LFCSP
1
14, 37
AVSS
Negative Analog Supply Pin. Voltage ranges from –3 V to –24 V. This pin can be
connected to 0 V if the output voltage range is unipolar.
2
39
DVCC
Digital Supply Pin. Voltage ranges from 2.7 V to 5.5 V.
This pin can also be configured as a 4.5 V LDO output by leaving the DVCC SELECT pin floating.
3
2
FAULT
Fault Alert. This pin is asserted low when an open circuit is detected in current mode or
an overtemperature is detected. Open drain output must be connected to a pull-up resistor.
4, 12
3, 15
GND
These pins must be connected to 0 V.
18
1, 10, 11, 19, 20,
21, 22, 25, 30,
31, 35, 38, 40
NC
No Connection. Do not connect to these pins.
5
4
CLEAR
SELECT
Selects the voltage output clear value, either zero-scale or midscale code (see Table 21).
6
5
CLEAR
Active High Input. Asserting this pin sets the current output to the bottom of the selected
range or sets the voltage output to the user selected value (zero-scale or midscale).
7
6
LATCH
Positive Edge Sensitive Latch. A rising LATCH edge parallel loads the input shift register
data into the DAC register, also updating the output.
8
7
SCLK
Serial Clock Input. Data is clocked into the shift register on the rising edge of SCLK. This
operates at clock speeds of up to 30 MHz.
9
8
SDIN
Serial Data Input. Data must be valid on the rising edge of SCLK.
10
9
SDO
Serial Data Output. Used to clock data from the serial register in daisy-chain or readback
mode. Data is valid on the rising edge of SCLK (see Figure 3 and Figure 4).
11
12, 13
GND
Ground Reference Pin.
13
16
RSET
An external, precision, low drift 15 k current setting resistor can be connected to this
pin to improve the IOUT temperature drift performance. See the AD5412/AD5422 Features
section.
14
17
REFOUT
Internal Reference Voltage Output. REFOUT = 5 V ± 5 mV.
15
18
REFIN
External Reference Voltage Input. Reference input range is 4 V to 5 V. REFIN = 5 V for a
specified performance.
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