參數(shù)資料
型號(hào): AD5392BST-3
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs
中文描述: SERIAL INPUT LOADING, 8 us SETTLING TIME, 14-BIT DAC, PQFP52
封裝: 10 X 10 MM, MS-026BCC, LQFP-52
文件頁數(shù): 37/44頁
文件大?。?/td> 1319K
代理商: AD5392BST-3
AD5390/AD5391/AD5392
APPLICATION INFORMATION
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful
consideration of the power supply and ground return layout
helps to ensure the rated performance. The printed circuit
board on which the AD539x is mounted should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. If the AD539x is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
Rev. A | Page 37 of 44
For supplies with multiple pins (AV
DD
, AV
CC
), it is recom-
mended to tie those pins together. The AD539x should have
ample supply bypassing of 10 μF in parallel with 0.1 μF on each
supply located as close to the package as possible—ideally right
up against the device. The 10 μF capacitors are the tantalum
bead type. The 0.1 μF capacitor should have low effective series
resistance (ESR) and effective series inductance (ESI), such as
the common ceramic types that provide a low impedance path
to ground at high frequencies, to handle transient currents due
to internal logic switching.
The power supply lines of the AD539x should use as large a
trace as possible to provide low impedance paths and reduce
the effects of glitches on the power supply line. Fast switching
signals such as clocks should be shielded with digital ground
to avoid radiating noise to other parts of the board, and should
never be run near the reference inputs. A ground line routed
between the DIN and SCLK lines helps reduce crosstalk
between them (not required on a multilayer board, because
there is a separate ground plane, but separating the lines helps).
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A micro-
strip technique is by far the best, but not always possible with a
double-sided board. In this technique, the component side of
the board is dedicated to ground plane, while signal traces are
placed on the soldered side.
TYPICAL CONFIGURATION CIRCUIT
Figure 40 shows a typical configuration for the AD539x-5 when
configured for use with an external reference. In the circuit
shown, all AGND, SIGNAL_GND, and DAC_GND pins are tied
together to a common AGND. AGND and DGND are
connected together at the AD539x device. On power-up, the
AD539x defaults to external reference operation. All AV
DD
lines
are connected together and driven from the same 5 V source. It
is recommended to decouple close to the device with a 0.1 μF
ceramic and a 10 μF tantalum capacitor. In this application, the
reference for the AD539x-5 is provided externally from either
an ADR421 or ADR431 2.5 V reference. Suitable external
references for the AD539x-3 include the ADR280 1.2 V
reference. The reference should be decoupled at the
REFOUT/REFIN pin of the device with a 0.1 μF capacitor.
0
AD539x
AV
DD
DV
DD
SIGNAL_GND
DAC_GND
DGND
VOUT 31
VOUT 0
AGND
REFOUT/REFIN
REF_GND
0.1
μ
F
10
μ
F
0.1
μ
F
0.1
μ
F
AV
DD
DV
DD
Figure 40. Typical Configuration with External Reference
Figure 41 shows a typical configuration when using the internal
reference. On power-up, the AD539x defaults to an external
reference; therefore, the internal reference needs to be config-
ured and turned on via a write to the AD539x control register.
On the AD5390/AD5392 Control Register Bit CR12 lets the
user choose the reference voltage; Bit CR10 is used to select the
internal reference. It is recommended to use the 2.5 V reference
when AV
DD
= 5 V, and the 1.25 V reference when AV
DD
= 3 V. On
the AD5391, Control Register Bit CR10 lets the user choose the
reference voltage; Bit CR8 is used to select the internal
reference.
0
ADR431/
ADR421
AD539x
AV
DD
DV
DD
SIGNAL_GND
DAC_GND
DGND
VOUT 31
VOUT 0
AGND
REFOUT/REFIN
REF_GND
0.1
μ
F
10
μ
F
0.1
μ
F
0.1
μ
F
AV
DD
DV
DD
Figure 41. Typical Configuration with Internal Reference
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