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參數(shù)資料
| 型號(hào)： | AD5381BSTZ-5-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 38/40頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT 40CH 5V 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | AD5381,3 Redesign Change 24/Oct/2011 |
| 設(shè)計(jì)資源： | 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5381 (CN0010) AD5381 Channel Monitor Function (CN0013) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 6µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 40 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 80mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 40 電壓，單極 |
| 采樣率（每秒）： | 167k |
| 其它名稱： | AD5381BSTZ-5-REELDKR |
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Data Sheet
AD5381
Rev. D | Page 7 of 40
Parameter
AD5381-31
Unit
Test Conditions/Comments
LOGIC OUTPUTS (BUSY, SDO)
VOL, Output Low Voltage
0.4
V max
Sinking 200 A
VOH, Output High Voltage
DVDD – 0.5
V min
Sourcing 200 A
High Impedance Leakage Current
±1
A max
SDO only
High Impedance Output Capacitance
5
pF typ
SDO only
LOGIC OUTPUT (SDA)3
VOL, Output Low Voltage
0.4
V max
ISINK = 3 mA
0.6
V max
ISINK = 6 mA
Three-State Leakage Current
±1
A max
Three-State Output Capacitance
8
pF typ
POWER REQUIREMENTS
AVDD
2.7/3.6
V min/max
DVDD
2.7/5.5
V min/max
Power Supply Sensitivity3
Midscale/ΑVDD
–85
dB typ
AIDD
0.375
mA/channel max
Outputs unloaded, boost off; 0.25 mA/channel typ
0.475
mA/channel max
Outputs unloaded, boost on; 0.325 mA/channel typ
DIDD
1
mA max
VIH = DVDD, VIL = DGND
AIDD (Power-Down)
20
A max
Typically 100 nA
DIDD (Power-Down)
20
A max
Typically 1 A
Power Dissipation
48
mW max
Outputs unloaded, boost off, AVDD = DVDD = 3 V
1 AD5381-3 is calibrated using an external 1.25 V reference. Temperature range is –40°C to +85°C.
2 Accuracy guaranteed from VOUT = 10 mV to AVDD – 50 mV.
3 Guaranteed by characterization, not production tested.
4 Default on the AD5381-3 is 1.25 V. Programmable to 2.5 V via CR10 in the AD5381 control register; operating the AD5381-3 with a 2.5 V reference will lead to degraded
accuracy specifications and limited input code range.
AC CHARACTERISTICS1
AVDD = 4.5 V to 5.5 V or 2.7 V to 3.6 V; DVDD = 2.7 V to 5.5 V; AGND = DGND = 0 V.
Table 4.
Parameter
All
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
1/4 scale to 3/4 scale change settling to ±1 LSB
3
s typ
8
s max
Slew Rate 2
1.5
V/s typ
Boost mode off, CR9 = 0
2.5
V/s typ
Boost mode on, CR9 = 1
Digital-to-Analog Glitch Energy
12
nV-s typ
Glitch Impulse Peak Amplitude
15
mV typ
DAC-to-DAC Crosstalk
1
nV-s typ
See Terminology section
Digital Crosstalk
0.8
nV-s typ
Digital Feedthrough
0.1
nV-s typ
Effect of input bus activity on DAC output under test
Output Noise 0.1 Hz to 10 Hz
15
V p-p typ
External reference, midscale loaded to DAC
40
V p-p typ
Internal reference, midscale loaded to DAC
Output Noise Spectral Density
@ 1 kHz
150
nV/√Hz typ
@ 10 kHz
100
nV/√Hz typ
1 Guaranteed by design and characterization, not production tested.
2 Slew rate can be programmed via the current boost control bit in the AD5381 control register.
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| AD5382BST-3 | 制造商:Analog Devices 功能描述:DAC 32-CH Resistor-String 14-bit 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:32/40-CHANNEL 3V/5V SINGLE SUPPLY 12/14-BIT VOUT DAC - Bulk |
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