參數(shù)資料
型號(hào): AD5381BSTZ-5-REEL
廠商: Analog Devices Inc
文件頁數(shù): 37/40頁
文件大小: 0K
描述: IC DAC 12BIT 40CH 5V 100-LQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5381,3 Redesign Change 24/Oct/2011
設(shè)計(jì)資源: 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5381 (CN0010)
AD5381 Channel Monitor Function (CN0013)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 6µs
位數(shù): 12
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 40
電壓電源: 單電源
功率耗散(最大): 80mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型: 40 電壓,單極
采樣率(每秒): 167k
其它名稱: AD5381BSTZ-5-REELDKR
AD5381
Data Sheet
Rev. D | Page 6 of 40
AD5381-3 SPECIFICATIONS
AVDD = 2.7 V to 3.6 V; DVDD = 2.7 V to 5.5 V, AGND = DGND = 0 V; external REFIN = 1.25 V;
all specifications T
MIN to TMAX, unless otherwise noted.
Table 3.
Parameter
AD5381-31
Unit
Test Conditions/Comments
ACCURACY
Output unloaded
Resolution
12
Bits
Relative Accuracy2 (INL)
±1
LSB max
Differential Nonlinearity (DNL)
±1
LSB max
Guaranteed monotonic over temperature
Zero-Scale Error
4
mV max
Offset Error
±4
mV max
Measured at Code 16 in the linear region
Offset Error TC
±5
V/°C typ
Gain Error
±0.05
% FSR max
At 25 °C
±0.1
% FSR max
TMIN to TMAX
Gain Temperature Coefficient 3
2
ppm FSR/°C typ
DC Crosstalk3
1
LSB max
REFERENCE INPUT/OUTPUT
Reference Input3
Reference Input Voltage
1.25
V
±1% for specified performance
DC Input Impedance
1
M min
Typically 100 M
Input Current
±10
A max
Typically ±30 nA
Reference Range
1 to AVDD/2
V min/max
Reference Output 4
Enabled via CR8 in the AD5381 control register
CR10 selects the reference voltage.
Output Voltage
1.245/1.255
V min/max
At ambient; optimized for 1.25 V operation; CR10 = 0
2.47/2.53
V min/max
CR10 = 1
Reference TC
±10
ppm/°C max
Temperature Range: +25°C to +85°C
±15
ppm/°C max
Temperature Range: –40°C to +85°C
Output Impedance
800
typ
OUTPUT CHARACTERISTICS3
Output Voltage Range2
0/AVDD
V min/max
Short-Circuit Current
40
mA max
Load Current
±1
mA max
Capacitive Load Stability
RL = ∞
200
pF max
RL = 5 k
1000
pF max
DC Output Impedance
0.6
max
MONITOR PIN
Output Impedance
1
k typ
Three-State Leakage Current
100
nA typ
LOGIC INPUTS (EXCEPT SDA/SCL)3
DVDD = 2.7 V to 3.6 V
VIH, Input High Voltage
2
V min
VIL, Input Low Voltage
DVDD > 3.6
0.8
V max
DVDD ≤ 3.6
0.6
V max
Input Current
±1
A max
Total for all pins; TA = TMIN to TMAX
Pin Capacitance
10
pF max
LOGIC INPUTS (SDA, SCL ONLY)3
VIH, Input High Voltage
0.7 × DVDD
V min
SMBus compatible at DVDD < 3.6 V
VIL, Input Low Voltage
0.3 × DVDD
V max
SMBus compatible at DVDD < 3.6 V
IIN, Input Leakage Current
±1
A max
VHYST, Input Hysteresis
0.05 × DVDD
V min
CIN, Input Capacitance
8
pF typ
Glitch Rejection
50
ns max
Input filtering suppresses noise spikes of less than 50 ns
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