參數(shù)資料
型號(hào)： AD5381BST-5
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
中文描述： PARALLEL, WORD INPUT LOADING, 6 us SETTLING TIME, 12-BIT DAC, PQFP100
封裝： 14 X 14 MM, MS-026-BED, LQFP-100
文件頁(yè)數(shù)： 35/36頁(yè)
文件大?。?/td> 1200K
代理商： AD5381BST-5
AD5381
OPTICAL ATTENUATORS
Based on its high channel count, high resolution, monotonic
behavior, and high level of integration, the AD5381 is ideally
targeted at optical attenuation applications used in dynamic
gain equalizers, variable optical attenuators (VOA), and optical
add-drop multiplexers (OADM). In these applications, each
wavelength is individually extracted using an arrayed wave
guide; its power is monitored using a photodiode, transimped-
ance amplifier and ADC in a closed-loop control system. The
AD5381 controls the optical attenuator for each wavelength,
ensuring that the power is equalized in all wavelengths before
being multiplexed onto the fiber. This prevents information loss
and saturation from occurring at amplification stages further
along the fiber.
Rev. A | Page 35 of 36
UTILIZING THE AD5381 FIFO
The AD5381 FIFO mode optimizes total system update rates in
applications where a large number of channels need to be
updated. FIFO mode is only available when parallel interface
mode is selected. The FIFO_EN pin is used to enable the FIFO.
The status of FIFO_EN is sampled during the initialization
sequence. Therefore, the FIFO status can only be changed by
resetting the device. In a telescope that provides for the cancel-
lation of atmospheric distortion, for example, a large number of
channels need to be updated in a short period of time. In such
systems, as many as 400 channels need to be updated within
40 μs. Four-hundred channels requires the use of 10 AD5381s.
With FIFO mode enabled, the data write cycle time is 40 ns;
therefore, each group consisting of 40 channels can be fully
loaded in 1.6 μs. In FIFO mode, a complete group of 40 chan-
nels will update in 14.4 μs. The time taken to update all 400
channels is 14.4 μs + 9 × 1.6 μs = 28.8 μs. Figure 44 shows the
FIFO operation scheme.
ATTENUATOR
ATTENUATOR
ATTENUATOR
ATTENUATOR
AWG
AWG
FIBRE
FIBRE
DWDM
OUT
OPTICAL
SWITCH
11
12
1n–1
1n
DWDM
IN
AD5381,
40-CHANNEL,
12-BIT DAC
N:1 MULTIPLEXER
16-BIT ADC
CONTROLLER
TIA/LOG AMP
(AD8304/AD8305)
ADG731
(40:1 MUX)
AD7671
(0-5V, 1MSPS)
PHOTODIODES
ADD
PORTS
DROP
PORTS
0
Figure 43. OADM Using the AD5381 as Part of an Optical Attenuator
GROUP A
CHNLS 0-39
GROUP B
CHNLS 40-79
GROUP C
CHNLS
80-119
GROUP D
CHNLS
120-159
GROUP E
CHNLS
160-199
GROUP F
CHNLS
200-239
GROUP G
CHNLS
240-279
GROUP H
CHNLS
280-319
GROUP I
CHNLS
320-359
GROUP J
CHNLS
360-399
TIME TO UPDATE 400 CHANNELS = 28.8
μ
s
1.6
μ
s
14.4
μ
s
14.4
μ
s
1.6
μ
s
FIFO DATA LOAD
GROUP A
FIFO DATA LOAD
GROUP B
OUTPUT UPDATE
TIME FOR GROUP A
1.6
μ
s
14.4
μ
s
FIFO DATA LOAD
GROUP J
OUTPUT UPDATE
TIME FOR GROUP J
OUTPUT UPDATE
TIME FOR GROUP B
0
Figure 44. Using FIFO Mode 400 Channels Updated in Under 30 μs
相關(guān)PDF資料
PDF描述
AD5381BST-5-REEL 40-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
AD5382BST-3-REEL CONNECTOR ACCESSORY
AD5382 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
AD5382BST-3 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
AD5382BST-5 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
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