DVCC = 2.5 V to 5.5 V; V
參數(shù)資料
型號: AD5371BSTZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 27/29頁
文件大小: 0K
描述: IC DAC 14BIT 40CH SER 80-LQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時(shí)間: 20µs
位數(shù): 14
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 40
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(12x12)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 40 電壓,單極;40 電壓,雙極
采樣率(每秒): *
配用: EVAL-AD5371EBZ-ND - BOARD EVAL FOR AD5371
AD5371
Rev. B | Page 6 of 28
TIMING CHARACTERISTICS
DVCC = 2.5 V to 5.5 V; VDD = 9 V to 16.5 V; VSS = 16.5 V to 8 V; VREFx = 3 V; AGND = DGND = SIGGNDx = 0 V; CL = 200 pF to GND;
RL = open circuit; gain (M), offset (C), and DAC offset registers at default values; all specifications TMIN to TMAX, unless otherwise noted.
Table 4. SPI Interface
Limit at TMIN, TMAX
Unit
Description
t1
20
ns min
SCLK cycle time
t2
8
ns min
SCLK high time
t3
8
ns min
SCLK low time
t4
11
ns min
SYNC falling edge to SCLK falling edge setup time
t5
20
ns min
Minimum SYNC high time
t6
10
ns min
24th SCLK falling edge to SYNC rising edge
t7
5
ns min
Data setup time
t8
5
ns min
Data hold time
42
ns max
SYNC rising edge to BUSY falling edge
t10
1/1.5
μs typ/μs max
BUSY pulse width low (single-channel update); see Table 9
t11
600
ns max
Single-channel update cycle time
t12
20
ns min
SYNC rising edge to LDAC falling edge
t13
10
ns min
LDAC pulse width low
t14
3
μs max
BUSY rising edge to DAC output response time
t15
0
ns min
BUSY rising edge to LDAC falling edge
t16
3
μs max
LDAC falling edge to DAC output response time
t17
20/30
μs typ/μs max
DAC output settling time
t18
140
ns max
CLR/RESET pulse activation time
t19
30
ns min
RESET pulse width low
t20
400
μs max
RESET time indicated by BUSY low
t21
270
ns min
Minimum SYNC high time in readback mode
25
ns max
SCLK rising edge to SDO valid
t23
80
ns max
RESET rising edge to BUSY falling edge
1 Guaranteed by design and characterization; not production tested.
2 All input signals are specified with tR = tF = 2 ns (10% to 90% of DVCC) and timed from a voltage level of 1.2 V.
4 t9 is measured with the load circuit shown in Figure 2.
5 t22 is measured with the load circuit shown in Figure 3.
Table 5. LVDS Interface
Limit at TMIN, TMAX
Unit
Description
t1
12
ns min
SCLK cycle time
t2
5
ns min
SCLK pulse width high and low time
t3
5
ns min
SYNC to SCLK setup time
t4
3
ns min
Data setup time
t5
3
ns min
Data hold time
t6
3
ns min
SCLK to SYNC hold time
t7
10
ns min
SYNC high time
1 Guaranteed by design and characterization; not production tested.
2 All input signals are specified with tR = tF = 2 ns (10% to 90% of DVCC) and timed from a voltage level of 1.2 V.
相關(guān)PDF資料
PDF描述
VI-B52-MX-S CONVERTER MOD DC/DC 15V 75W
VI-B51-MX-S CONVERTER MOD DC/DC 12V 75W
VI-B50-MX-S CONVERTER MOD DC/DC 5V 75W
AD9148BBCZRL IC DAC 16BIT QD 1GSPS 196CSPBGA
VE-JTK-MW-S CONVERTER MOD DC/DC 40V 100W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD5372 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel, 16/14, Serial Input, Voltage-Output DACs
AD5372BCPZ 制造商:Analog Devices 功能描述:DAC 32CH-CH RES-STRING 16BIT 56LFCSP EP - Trays
AD5372BCPZ-REEL7 制造商:Analog Devices 功能描述:DAC 32CH-CH RES-STRING 16BIT 56LFCSP EP - Tape and Reel
AD5372BCPZ-RL7 功能描述:16 Bit Digital to Analog Converter 32 56-LFCSP-VQ (8x8) 制造商:analog devices inc. 系列:- 包裝:帶卷(TR) 零件狀態(tài):上次購買時(shí)間 位數(shù):16 數(shù)模轉(zhuǎn)換器數(shù):32 建立時(shí)間:30μs 輸出類型:Voltage - Buffered 差分輸出:無 數(shù)據(jù)接口:SPI,DSP 參考類型:外部 電壓 - 電源,模擬:9 V ~ 16.5 V,-4.5 V ~ 16.5 V 電壓 - 電源,數(shù)字:2.5 V ~ 5.5 V INL/DNL(LSB):±4(最大),±1(最大) 架構(gòu):電阻串 DAC 工作溫度:-40°C ~ 85°C 封裝/外殼:56-VFQFN 裸露焊盤,CSP 供應(yīng)商器件封裝:56-LFCSP-VQ(8x8) 標(biāo)準(zhǔn)包裝:1
AD5372BSTZ 功能描述:IC DAC 16BIT 32CH SER 64-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散(最大):- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP,8-MSOP(0.118",3.00mm 寬) 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓,單極 采樣率(每秒):* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF)