參數(shù)資料
型號(hào)： AD5330BRU
廠商： ANALOG DEVICES INC
元件分類(lèi)： DAC
英文描述： 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
中文描述： PARALLEL, 8 BITS INPUT LOADING, 6 us SETTLING TIME, 8-BIT DAC, PDSO20
封裝： PLASTIC, TSSOP-20
文件頁(yè)數(shù)： 9/20頁(yè)
文件大?。?/td> 359K
代理商： AD5330BRU
REV. 0
AD5330/AD5331/AD5340/AD5341
–9–
TERMINOLOGY
RELATIVE ACCURACY
For the DAC, Relative Accuracy or Integral Nonlinearity (INL)
is a measure of the maximum deviation, in LSBs, from a straight
line passing through the actual endpoints of the DAC transfer
function. Typical INL versus Code plot can be seen in Figures
5, 6, and 7.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of
±
1 LSB
maximum ensures monotonicity. This DAC is guaranteed mono-
tonic by design. Typical DNL versus Code plot can be seen in
Figures 8, 9, and 10.
GAIN ERROR
This is a measure of the span error of the DAC (including any
error in the gain of the buffer amplifier). It is the deviation in
slope of the actual DAC transfer characteristic from the ideal
expressed as a percentage of the full-scale range. This is illus-
trated in Figure 2.
OFFSET ERROR
This is a measure of the offset error of the DAC and the output
amplifier. It is expressed as a percentage of the full-scale range.
If the offset voltage is positive, the output voltage will still be
positive at zero input code. This is shown in Figure 3. Because
the DACs operate from a single supply, a negative offset cannot
appear at the output of the buffer amplifier. Instead, there will
be a code close to zero at which the amplifier output saturates
(amplifier footroom). Below this code there will be a deadband
over which the output voltage will not change. This is illustrated
in Figure 4.
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
GAIN ERROR
ACTUAL
IDEAL
NEGATIVE
GAIN
ERROR
Figure 2. Gain Error
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
OFFSET
GAIN ERROR
AND
OFFSET ERROR
ACTUAL
IDEAL
Figure 3. Positive Offset Error and Gain Error
OUTPUT
VOLTAGE
DAC CODE
NEGATIVE
OFFSET
GAIN ERROR
AND
OFFSET ERROR
ACTUAL
IDEAL
AMPLIFIER
FOOTROOM
(~1mV)
NEGATIVE
OFFSET
DEADBAND CODES
Figure 4. Negative Offset Error and Gain Error
相關(guān)PDF資料
PDF描述
AD5331 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
AD5331BRU 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
AD5335 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
AD5335BRU 2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs
AD5336 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
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