VDD = +3 V ±" />
參數(shù)資料
型號: AD5251BRUZ100
廠商: Analog Devices Inc
文件頁數(shù): 24/28頁
文件大?。?/td> 0K
描述: IC POT DGTL DL 100K 64P 14TSSOP
標(biāo)準(zhǔn)包裝: 96
接片: 64
電阻(歐姆): 100k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 650 ppm/°C
存儲器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V,±2.25 V ~ 2.75 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
Data Sheet
AD5251/AD5252
Rev. D | Page 5 of 28
10 k, 50 k, 100 k VERSIONS
VDD = +3 V ± 10% or +5 V ± 10%, VSS = 0 V or VDD/VSS = ± 2.5 V ± 10%, VA = VDD, VB = 0 V, –40°C < TA < +105°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
DC CHARACTERISTICS—
RHEOSTAT MODE
Resolution
N
AD5251
6
Bits
AD5252
8
Bits
Resistor Differential Nonlinearity2
R-DNL
R
WB, RWA = NC, AD5251
0.75
±0.10
+0.75
LSB
R
WB, RWA = NC, AD5252
1.00
±0.25
+1.00
LSB
Resistor Nonlinearity2
R-INL
R
WB, RWA = NC, AD5251
0.75
±0.25
+0.75
LSB
R
WB, RWA = NC, AD5252
2.5
±1.0
+2.5
LSB
Nominal Resistor Tolerance
ΔR
AB/RAB
T
A = 25°C
20
+20
%
Resistance Temperature
Coefficient
(ΔR
AB/RAB) × 10
6/ΔT
650
ppm/°C
Wiper Resistance
R
W
I
W = 1 V/R, VDD = 5 V
75
130
I
W = 1 V/R, VDD = 3 V
200
300
Channel-Resistance Matching
ΔR
AB1/ΔRAB2
R
AB = 10 k, 50 k
0.15
%
R
AB = 100 k
0.05
%
DC CHARACTERISTICS—
POTENTIOMETER DIVIDER MODE
Differential Nonlinearity3
DNL
AD5251
0.5
±0.1
+0.5
LSB
AD5252
1.0
±0.3
+1.0
LSB
Integral Nonlinearity3
INL
AD5251
0.50
±0.15
+0.50
LSB
AD5252
1.5
±0.5
+1.5
LSB
Voltage Divider
Temperature Coefficient
(ΔV
W/VW) × 10
6/ΔT
Code = half scale
15
ppm/°C
Full-Scale Error
V
WFSE
Code = full scale, AD5251
1.0
0.3
0
LSB
Code = full scale, AD5252
3
1
0
LSB
Zero-Scale Error
V
WZSE
Code = zero scale, AD5251
0
0.3
1.0
LSB
Code = zero scale, AD5252
0
1.2
3.0
LSB
RESISTOR TERMINALS
Voltage Range4
V
A, VB, VW
V
SS
V
DD
V
Capacitance5 A, B
C
A, CB
f = 1 kHz, measured to GND,
code = half scale
85
pF
Capacitance5 W
C
W
f = 1 kHz, measured to GND,
code = half scale
95
pF
Common-Mode Leakage Current
I
CM
V
A = VB = VDD/2
0.01
1.00
A
DIGITAL INPUTS AND OUTPUTS
Input Logic High
V
IH
V
DD = 5 V, VSS = 0 V
2.4
V
DD/VSS = +2.7 V/0 V or VDD/VSS = ±2.5 V
2.1
V
Input Logic Low
V
IL
V
DD = 5 V, VSS = 0 V
0.8
V
DD/VSS = +2.7 V/0 V or VDD/VSS = ±2.5 V
0.6
V
Output Logic High (SDA)
V
OH
R
PULL-UP = 2.2 k to VDD = 5 V, VSS = 0 V
4.9
V
Output Logic Low (SDA)
V
OL
R
PULL-UP = 2.2 k to VDD = 5 V, VSS = 0 V
0.4
V
WP Leakage Current
I
WP
WP = VDD
8
A
A0 Leakage Current
I
A0
A0 = GND
3
A
Input Leakage Current
(Other than WP and A0)
I
V
IN = 0 V or VDD
±1
A
Input Capacitance5
C
I
5
pF
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