參數(shù)資料
型號(hào): AD524BDZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 27/28頁(yè)
文件大?。?/td> 0K
描述: IC AMP INST 1MHZ PREC LN 16CDIP
標(biāo)準(zhǔn)包裝: 23
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 5 V/µs
增益帶寬積: 1MHz
-3db帶寬: 1MHz
電流 - 輸入偏壓: 25nA
電壓 - 輸入偏移: 100µV
電流 - 電源: 3.5mA
電壓 - 電源,單路/雙路(±): ±6 V ~ 18 V
工作溫度: -25°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-CDIP 側(cè)面銅焊
包裝: 管件
產(chǎn)品目錄頁(yè)面: 770 (CN2011-ZH PDF)
AD524
Rev. F | Page 8 of 28
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
Supply Voltage
±18 V
Internal Power Dissipation
450 mW
Input Voltage1
(Either Input Simultaneously) |VIN| + |VS|
<36 V
Output Short-Circuit Duration
Indefinite
Storage Temperature Range
(R)
–65°C to +125°C
(D, E)
–65°C to +150°C
Operating Temperature Range
AD524A/AD524B/AD524C
–25°C to +85°C
AD524S
–55°C to +125°C
Lead Temperature (Soldering, 60 sec)
+300°C
1 Maximum input voltage specification refers to maximum voltage to which
either input terminal may be raised with or without device power applied.
For example, with ±18 volt supplies maximum, VIN is ±18 V; with zero supply
voltage maximum, VIN is ±36 V.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
RG1 16
–INPUT
1
+INPUT
2
RG2
3
4
INPUT
NULL
5
INPUT
NULL
6
REFERENCE
9
OUTPUT
8 +VS
7 –VS
SENSE
10
G = 1000
11
G = 100
12
G = 10
13
OUTPUT
NULL
14
OUTPUT
NULL
15
0.170 (4.33)
0.103
(2.61)
PAD NUMBERS CORRESPOND TO PIN NUMBERS FOR
THE D-16 AND RW-16 16-LEAD CERAMIC PACKAGES.
00
50
0-
0
02
Figure 2. Metallization Photograph
Contact factory for latest dimensions;
Dimensions shown in inches and (mm)
CONNECTION DIAGRAMS
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
– INPUT
+ INPUT
INPUT NULL
REFERENCE
OUTPUT NULL
G = 10
G = 100
G = 1000
SENSE
OUTPUT
AD524
RG2
RG1
–VS
+VS
SHORT TO
RG2 FOR
DESIRED
GAIN
415
514
OUTPUT
OFFSET NULL
INPUT
OFFSET NULL
TOP VIEW
(Not to Scale)
0
500-
003
Figure 3. Ceramic (D) and
SOIC (RW-16 and D-16) Packages
SHORT TO
RG2 FOR
DESIRED
GAIN
4
RG2
5
INPUT NULL
6
NC
7
INPUT NULL
8
REFERENCE
18
OUTPUT NULL
17
G = 10
16
NC
15
G = 100
14
G = 1000
19
RG
1
20
OU
T
PU
T
NUL
L
1
NC
2
–I
N
P
U
T
3
+
INP
UT
13
SEN
S
E
12
OU
TP
U
T
11
NC
10
+V
S
9
–V
S
NC = NO CONNECT
AD524
TOP VIEW
(Not to Scale)
+VS
–VS
INPUT
OFFSET NULL
OUTPUT
OFFSET NULL
719
518
0
0500-
004
Figure 4. Leadless Chip Carrier (E)
ESD CAUTION
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