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參數(shù)資料
| 型號： | AD5170EVAL |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | 256-Position Two-Time Programmable I2C Digital Potentiometer |
| 中文描述： | 256位二時間的I2C可編程數(shù)字電位器 |
| 文件頁數(shù)： | 15/24頁 |
| 文件大?。?/td> | 900K |
| 代理商： | AD5170EVAL |
AD5170
the 2.7 V system voltage is applied first, and the P1 and P2 gates
are pulled to ground, thus turning on P1 and subsequently P2.
As a result, V
DD
of the AD5170 approaches 2.7 V. When the
AD5170 setting is found, the factory tester applies the V
DD_OTP
to both the V
DD
and the MOSFETs gates turning off P1 and P2.
The OTP command is executed at this time to program the
AD5170 while the 2.7 V source is protected. Once the fuse
programming is completed, the tester withdraws the V
DD_OTP
and the setting for AD5170 is permanently fixed.
Rev. A | Page 15 of 24
AD5170 achieves the OTP function through blowing internal
fuses. Users should always apply the 5.25 V to 5.5 V one-time
program voltage requirement at the first fuse programming
attempt. Failure to comply with this requirement may lead to a
change in the fuse structures, rendering programming
inoperable.
Poor PCB layout introduces parasitics that may affect the fuse
programming. Therefore, it is recommended to add a 10 μF
tantalum capacitor in parallel with a 1 nF ceramic capacitor as
close as possible to the V
DD
pin. The type and value chosen for
both capacitors are important. This combination of capacitor
values provides both a fast response and larger supply current
handling with minimum supply droop during transients. As a
result, these capacitors increase the OTP programming success
by not inhibiting the proper energy needed to blow the internal
fuses. Additionally, C1
minimizes transient disturbance and low
frequency ripple while C2 reduces high frequency noise during
normal operation.
LAYOUT CONSIDERATIONS
It is good practice to employ compact, minimum lead length
layout design. The leads to the inputs should be as direct as
possible with a minimum conductor length. Ground paths
should have low resistance and low inductance.
Note that the digital ground should also be joined remotely to
the analog ground at one point to minimize the ground bounce.
V
DD
GND
V
DD
C1
10
μ
F
C2
1nF
AD5170
+
0
Figure 40. Power Supply Bypassing
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| AD5171BRJ10-R2 | 制造商:Analog Devices 功能描述:IC,Digital Potentiometer,CMOS,TSSOP,8PIN,PLASTIC |
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