參數(shù)資料
型號(hào): AD5066BRUZ-1
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: Fully Accurate 16-Bit UnBuffered VOUT DAC SPI Interface 2.7 V to 5.5 V in a TSSOP
中文描述: QUAD, SERIAL INPUT LOADING, 14 us SETTLING TIME, 16-BIT DAC, PDSO16
封裝: LEAD FREE, MO-153AB, TSSOP-16
文件頁數(shù): 15/20頁
文件大?。?/td> 309K
代理商: AD5066BRUZ-1
Preliminary Technical Data
AD5066
Table 9. DCEN (Daisy-Chain Enable) Register
(DB1)
0
1
Table 10. 32-Bit Input Shift Register Contents for Daisy-Chain Enable and Reference Set-Up Function
MSB
DB31 to DB28
DB27
DB26
DB25
DB24
X
1
0
0
0
Don’t cares
Command bits (C3 to C0)
Rev. PrB | Page 15 of 20
(DB0)
0
0
Action
Standalone mode (default)
DCEN mode
DB23
X
DB22
X
Address bits (A3 to A0)
DB21
X
DB20
X
DB2 to DB19
X
Don’t cares
DB1
1/0
LSB
DB0
1/0
DCEN
register
Table 11. Modes of Operation
DB9
0
0
1
1
DB8
0
1
0
1
Operating Mode
Normal operation
Power-down modes
1 kΩ to GND
100 kΩ to GND
Three-state
Table 12. 32-Bit Input Shift Register Contents for Power-Up/Power-Down Function
MSB
DB31 to
DB28
DB27
DB26
DB25
DB24
DB23
X
0
1
0
0
X
Don’t
cares
DB10 to
DB19
X
Don’t
cares
DB4 to
DB7
X
Don’t
cares
LSB
DB22
X
DB21
X
DB20
X
DB9
PD1
Power-down
mode
DB8
PD0
DB3
DAC D
Power-down/power-up channel selection—
set bit to 1 to select
DB2
DAC C
DB1
DAC B
DB0
DAC A
Command bits (C2 to C0)
Address bits (A3 to A0)—
don’t cares
Figure 9. Output Stage During Power-Down
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