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參數(shù)資料
| 型號(hào)： | AD2S93AP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 位置變換器 |
| 英文描述： | Aluminum Electrolytic Capacitor; Capacitor Type:Industrial Grade; Voltage Rating:350VDC; Capacitor Dielectric Material:Aluminum Electrolytic; Operating Temperature Range:-40 C to +85 C; Capacitance:160uF RoHS Compliant: Yes |
| 中文描述： | LVDT OR RVDT TO DIGITAL CONVERTER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 349K |
| 代理商： | AD2S93AP |
–6–
REV. A
AD2S93
+VE POSITION
FULL SCALE
–VE POSITION
FULL SCALE
NULL
POSITION
OUTPUT CODES
MAGNITUDE
0100
0000
0000
0000
0100
0100
0000
1111
0000
0000
1111
0000
0000
1111
0000
0001
0000
0001
0001
1111
0000
0000
1111
0000
0000
1111
0000
0001
0001
0001
0011
0011
1111
1111
0000
0000
1111
1111
0000
0000
1110
1111
0000
0001
0011
1111
1111
1111
RANGE
OVER-
AA
–1
0
1
RATIO OF A- B/REF/2
A – B = – REF/2
A – B = + REF/2
A – B = 0
UNDER-
RANGE
A
LOS
OVR
UNR
SIGN
A
Figure 2. Output Code Format
If the maximum operating stroke of an LVDT yielded a 1 V rms
A–B output, the weighting of the LVDT to AD2S93 digital out-
put would be:
Input Signal Full Scale
Full-Scale Operating Range
(
±
2
12
)
1
×
2 2
2
13
Input Scaling
=
345
μ
V
/
LSB
This can be equated directly to the LVDT sensitivity specifica-
tion in mm/v/v.
Note: The overrange and underrange quadrants can be utilized
by decoding the overrange and underrange MSBs and decoding
the 12 magnitude bits. This will increase the operating range of
the AD2S93 accordingly. However, if the input A–B > V
REF
then the converter will lose track of the input and will only re-
gain track when the input signal returns to within the operating
range of the converter.
INPUT GAIN
Since the transformation ratio of an LVDT or RVDT from exci-
tation voltage to signal voltage can be 1:0.15, provision for gain
scaling has been provided. The gain can, therefore, be selected
to ensure that the full-scale output of converter represents the
maximum stroke position of the transducer.
The gain setting is accomplished by connecting Pin 2, (DIFF)
and Pin 3 (GAIN) together (unity gain) or connecting two resis-
tors as shown in Figure 3.
The gain of the input stage is calculated using the following
equation:
DIFF
(
A
–
B
)
(
A
–
B
)
IN
=
1
+
R
3
R
4
e.g., For a gain of 5, R3 = 12 k
, R4 = 3 k
For a gain of 10, R3 = 18 k
, R4 = 2 k
AGND
R4
R3
GAIN
DIFF
A
B
Figure 3. Pre-Amp Gain Block
SETTING THE CONVERTER BANDWIDTH
The AD2S93 bandwidth is set by placing three external compo-
nents, C1, C2, and R2, around the integrator as illustrated by
the figure below.
TH
I
R1
C2
C1
R2
C
V
R
V
TH
O
62.5
VCO
INT
Figure 4. Integrator and VCO
Before the bandwidth can be set, the corresponding VCO gain
setting must be determined. The VCO gain is directly related to
the slew rate of the converter. This is set internally to two dif-
ferent rates defined internally by R
V
.
Typical converter slew rates are defined below,
G
(1) = 2400
LSB
/
ms
–
Mode
1
G
(2) = 800
LSB
/
ms
–
Mode
2
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD2S99AP | 功能描述:IC OSC SINUSOIDAL 20KHZ 20-PLCC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 可編程計(jì)時(shí)器和振蕩器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:45 系列:- 類型:溫度 - 補(bǔ)償晶體振蕩器（TCXO） 計(jì)數(shù):- 頻率:25MHz 電源電壓:3.135 V ~ 3.465 V 電流 - 電源:1.5mA 工作溫度:-40°C ~ 85°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 包裝:管件 供應(yīng)商設(shè)備封裝:16-SOIC W 安裝類型:表面貼裝 |
| AD2S99APZ | 功能描述:IC OSC SINUSOIDAL 20KHZ 20-PLCC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 可編程計(jì)時(shí)器和振蕩器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:45 系列:- 類型:溫度 - 補(bǔ)償晶體振蕩器（TCXO） 計(jì)數(shù):- 頻率:25MHz 電源電壓:3.135 V ~ 3.465 V 電流 - 電源:1.5mA 工作溫度:-40°C ~ 85°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 包裝:管件 供應(yīng)商設(shè)備封裝:16-SOIC W 安裝類型:表面貼裝 |
| AD2S99APZ | 制造商:Analog Devices 功能描述:Phase Lock Loop (PLL) IC |
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