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參數(shù)資料
| 型號： | AD2S80AUD |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 位置變換器 |
| 英文描述： | Variable Resolution, Monolithic Resolver-to-Digital Converter |
| 中文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDIP40 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-40 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 268K |
| 代理商： | AD2S80AUD |
AD2S80A
REV. A
–14–
OSCILLATOR
(e.g., OSC1758)
C3
R3
TWISTED PAIR SCREENED CABLE
RESOLVER
S2
S4
S3
S1
R1
R2
1
2
3
4
5
6
7
31
AD2S80A
REF I/P
COS I/P
ANALOG
GND
DIGITAL
GND
SIGNAL
GND
SIN I/P
POWER
RETURN
Figure 7. Connecting the AD2S80A to a Resolver
CONNE CT ING T HE RE SOLVE R
T he recommended connection circuit is shown in Figure 7.
In cases where the reference phase relative to the input signals
from the resolver requires adjustment, this can be easily
achieved by varying the value of the resistor R2 of the HF filter
(see Figure 1).
Assuming that R1 = R2 = R and C1 = C2 = C
and Reference Frequency =
1
2
π
RC
by altering the value of R2, the phase of the reference relative to
the input signals will change in an approximately linear manner
for phase shifts of up to 10 degrees.
Increasing R2 by 10% introduces a phase lag of 2 degrees. De-
creasing R2 by 10% introduces a phase lead of 2 degrees.
C
R
R
C
PHASE LEAD = ARC TAN
1
2
π
fRC
PHASE LAG = ARC TAN 2
π
fRC
Phase Shift Circuits
T Y PICAL CIRCUIT CONFIGURAT ION
Figure 8 shows a typical circuit
configuration for the AD2S80A
in a 12-bit resolution mode. Values of the external components
have been chosen for a reference frequency of 5 kHz and a
maximum tracking rate of 260 rps with a bandwidth of 520 Hz.
Placing the values for R4, R6, C4 and C5 in the equation for K
A
gives a value of 2.7
×
10
6
. T he resistors are 0.125 W, 5% toler-
ance preferred values. T he capacitors are 100 V ceramic, 10%
tolerance components.
For signal and reference voltages greater than 2 V rms a simple
voltage divider circuit of resistors can be used to generate the
correct signal level at the converter. Care should be taken to en-
sure that the ratios of the resistors between the sine signal line
and ground and the cosine signal line and ground are the same.
Any difference will result in an additional position error.
For more information on resistive scaling of SIN, COS and
REFERENCE converter inputs refer to the application note,
“Circuit Applications of the 2S81 and 2S81 Resolver-to-Digital
Converters.”
RE LIABILIT Y
T he AD2S80A Mean T ime Between Failures (MT BF) has been
calculated according to MIL-HDBK -217E, Figure 10 shows the
MT BF in hours in naval sheltered conditions for AD2S80A/
883B only.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD2S80AUD/B | 制造商:Analog Devices 功能描述:2 ARC MIN HIREL MIL TEMP - Bulk |
| AD2S80AUE | 制造商:AD 制造商全稱:Analog Devices 功能描述:Variable Resolution, Monolithic Resolver-to-Digital Converter |
| AD2S80SD | 制造商:Analog Devices 功能描述: |
| AD2S81 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Variable Resolution, Monolithic Resolver-to-Digital Converters |
| AD2S81A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Variable Resolution, Monolithic Resolver-to-Digital Converters |
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