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參數(shù)資料
| 型號(hào)： | AD2S80AKD |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 位置變換器 |
| 英文描述： | Flat / Ribbon Cable |
| 中文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDIP40 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-40 |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大?。?/td> | 268K |
| 代理商： | AD2S80AKD |
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AD2S80A
REV. A
–11–
for sinusoidal signals in phase or antiphase with the reference
(for a square wave the DEMODULAT OR OUT PUT voltage
will equal the DEMODULAT OR INPUT ). T his provides a sig-
nal at the DEMODULAT OR OUT PUT which is a dc level
proportional to the positional error of the converter.
DC Error Scaling = 160 mV/bit (10 bits resolution)
= 40 mV/bit (12 bits resolution)
= 10 mV/bit (14 bits resolution)
= 2.5 mV/bit (16 bits resolution)
When the tracking loop is closed, this error is nulled to zero un-
less the converter input angle is accelerating.
Integrator
T he integrator components (R4, C4, R5, C5) are external to the
AD2S80A to allow the user to determine the optimum dynamic
characteristics for any given application. T he section “COMPO-
NENT SELECT ION” explains how to select components for a
chosen bandwidth.
Since the output from the integrator is fed to the VCO INPUT ,
it is proportional to velocity (rate of change of output angle) and
can be scaled by selection of R6, the VCO input resistor. T his is
explained in the section “VOLT AGE CONT ROLLED OSCIL-
LAT OR (VCO)” below.
T o prevent the converter from “flickering” (i.e., continually
toggling by
±
1 bit when the quantized digital angle,
φ
, is not an
exact representation of the input angle,
θ
) feedback is internally
applied from the VCO to the integrator input to ensure that the
VCO will only update the counter when the error is greater than
or equal to 1 LSB. In order to ensure that this feedback “hys-
teresis” is set to 1 LSB the input current to the integrator must
be scaled to be 100 nA/bit. T herefore,
R
4
=
DC Error Scaling
(
mV
/
bit
)
100(
nA
/
bit
)
Any offset at the input of the integrator will affect the accuracy
of the conversion as it will be treated as an error signal and off-
set the digital output. One LSB of extra error will be added for
each 100 nA of input bias current. T he method of adjusting out
this offset is given in the section “COMPONENT SELECT ION.”
Voltage Controlled Oscillator
(VCO)
T he VCO is essentially a simple integrator feeding a pair of dc
level comparators. Whenever the integrator output reaches one
of the comparator threshold voltages, a fixed charge is injected
into the integrator input to balance the input current. At the
same time the counter is clocking either up or down, dependent
on the polarity of the input current. In this way the counter is
clocked at a rate proportional to the magnitude of the input cur-
rent of the VCO.
During the reset period the input continues to be integrated, the
reset period is constant at 400 ns.
T he VCO rate is fixed for a given input current by the VCO
scaling factor:
= 7.9
kHz
/
μ
A
T he tracking rate in rps per
μ
A of VCO input current can be
found by dividing the VCO scaling factor by the number of LSB
changes per rev (i.e., 4096 for 12-bit resolution).
T he input resistor R6 determines the scaling between the con-
verter velocity signal voltage at the INT EGRAT OR OUT PUT
pin and the VCO input current. T hus to achieve a 5 V output at
100 rps (6000 rpm
)
and 12-bit resolution the VCO input cur-
rent must be:
(100
×
4096)/(7900)
=
51.8
μ
A
T hus, R6 would be set to: 5/(51.8
×
10
–6
) =
96 k
T he velocity offset voltage depends on the VCO input resistor,
R6, and the VCO bias current and is given by
Velocity Offset Voltage = R
6
×
(
VCO bias current)
T he temperature coefficient of this offset is given by
Velocity Offset Tempco =
R6
×
(
VCO
bias current tempco)
where the VCO bias current tempco is typically –1.22 nA/
°
C.
T he maximum recommended rate for the VCO is 1.1 MHz
which sets the maximum possible tracking rate.
Since the minimum voltage swing available at the integrator
output is
±
8 V, this implies that the minimum value for R6 is
57 k
. As
Max Current
=
1.1
×
10
6
7.9
×
10
3
=
139
μ
A
8
139
×
10
±6
=
57
k
MinValue R
6
T ransfer Function
By selecting components using the method outlined in the sec-
tion “Component Selection,” the converter will have a critically
damped time response and maximum phase margin. T he
Closed-Loop T ransfer Function is given by:
θ
OUT
θ
IN
=
14(1
+
s
N
)
2
+
3.4
s
N
+
5.8)
(
s
N
+
2.4)(
s
N
where, s
N
, the normalized frequency variable is:
s
N
=
2
π
s
f
BW
and
f
BW
is the closed-loop 3 dB bandwidth (selected by the
choice of external components).
T he acceleration K
A
,
is given approximately by
K
A
=
6
×
(
f
BW
)
2
sec
±2
T he normalized gain and phase diagrams are given in Figures 4
and 5.
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| AD2S80ALD | 功能描述:IC R/D CONV TRACKING 40CDIP RoHS:否 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
| AD2S80ASD | 功能描述:IC R/D CONV TRACKING 40CDIP RoHS:否 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
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| AD2S80ASE | 制造商:AD 制造商全稱:Analog Devices 功能描述:Variable Resolution, Monolithic Resolver-to-Digital Converter |
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