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參數(shù)資料
| 型號： | AD2S105AP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | ECONOLINE: RD & RC - Dual Output from a Single Input Rail- 1kVDC & 2kVDC Isolation- Power Sharing on Output- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 86% |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 292K |
| 代理商： | AD2S105AP |
AD2S105
REV. 0
–4–
PIN DESIGNATIONS
1, 2, 3
Pin
Mnemonic
Description
3
4
5
6
7
10
11
12
STROBE
V
DD
V
SS
PH/OP4
PH/OP1
AGND
PH/IP4
PH/IPH3
Begin Conversion
Positive Power Supply
Negative Power Supply
Sin (
θ + φ)
Cos (
θ + φ)
Analog Ground
Sin
θ
Input
High Level Cos
(
θ
+ 240
°
) Input
Cos (
θ
+ 240
°
) Input
High Level Cos
(
θ
+ 120
°
) Input
Cos (
θ
+ 120
°
) Input
High Level Cos
θ
Input
Cos
(θ)
Input
Negative Power Supply
Homopolar Reference
Homopolar Output
Homopolar Filter
Select Analog Input
Format
Select Analog Input
Format
Cos Output
Sin Output
(DB1 = MSB, DB12 =
LSB Parallel Input Data)
Positive Power Supply
Digital Ground
Internal Logic Setup
Time
13
14
PH/IP3
PH/IPH2
15
16
17
19
20
21
22
23
PH/IP2
PH/IPH1
PH/IP1
V
SS
HPREF
HPOP
HPFILT
CONV1
24
CONV2
25
26
27–38
COS
SIN
DB12 to DB1
41
42
44
V
DD
DGND
BUSY
NOTES
1
90
°
orthogonal signals = Sin
θ
, Cos
θ
(Resolver) = PH/IP4 and PH/IP1.
2
Three phase, 120
°
, three-wire signals = Cos
θ
, Cos (
θ
+ 120
°
), Cos (
θ
+ 240
°
).
= PH/IP1, PH/IP2, PH/IP3
High Level = PH/IPH1, PH/IPH2, PH/IPH3.
3
Three Phase, 120
°
, two-wire signals = Cos (
θ
+ 120
°
), Cos (
θ
+ 240
°
) =
PH/IP2, PH/IP3.
In all cases where any of the input Pins 11 through 17 are not used, they must
be left unconnected.
PIN CONFIGURATION
6
5
4
3
2
1
44
43
42
41
40
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
V
S
V
D
S
N
N
B
D
V
D
N
N
V
S
H
H
C
C
C
D
H
D
NC = NO CONNECT.
TOP VIEW
(NOT TO SCALE)
AD2S105
P
N
S
7
8
11
12
13
14
15
16
17
9
10
NC
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
PH/OP1
NC
NC
AGND
PH/IP4
PH/IPH3
PH/IP3
PH/IPH2
PH/IP2
PH/IPH1
PH/IP1
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