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參數(shù)資料
| 型號(hào)： | AD2S105AP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | ECONOLINE: RD & RC - Dual Output from a Single Input Rail- 1kVDC & 2kVDC Isolation- Power Sharing on Output- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 86% |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大?。?/td> | 292K |
| 代理商： | AD2S105AP |
AD2S105–SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Conditions
SIGNAL INPUTS
PH/IP1, 2, 3, 4 Voltage Level
PH/IPH1, 2, 3 Voltage Level
Input Impedance
PH/IP1, 2, 3
PH/IPH1, 2, 3
PH/IP1, 4
±
2.8
±
3.3
±
4.25
V p-p
V p-p
DC to 50 kHz
DC to 50 kHz
7.5
13.5
10
18
1
k
k
M
Mode 1 Only (2 Phase)
Sin & Cos
Gain
PH/IP1, 2, 3, 4
PH/IPH1, 2, 3
0.95
1
0.56
1.05
VECTOR PERFORMANCE
3-Phase Input-Output
Radius Error (Any Phase)
Angular Error
1, 2
PH/IP
PH/IPH
Differential Nonlinearity
Full Power Bandwidth
Small Signal Bandwidth
±
0.4
±
1
%
DC to 600 Hz
15
30
30
±
1
arc min
arc min
LSB
kHz
kHz
DC to 600 Hz
DC to 600 Hz
50
200
ANALOG SIGNAL OUTPUTS
PH/OP1, 4
Output Voltage
3
Offset Voltage
Slew Rate
Small Signal Step Response
PH/IP, PH/IPH INPUTS
DC to 50 kHz
Inputs = 0 V
±
2.8
2
2
1
±
3.3
10
V p-p
mV
V/
μ
s
μ
s
1
°
Input to Settle to
±
1 LSB (Input to Output)
Output Impedance
Output Drive Current
Resistive Load
Capacitive Load
15
4.0
mA
k
pF
3.0
2
Outputs to AGND
50
STROBE
Write
Max Update Rate
100
ns
kHz
Positive Pulse
366
BUSY
Pulse Width
V
OH
V
OL
1.7
2.5
μ
s
V dc
V dc
Conversion in Process
I
OH
= 0.5 mA
I
OL
= 0.5 mA
4
1
DIGITAL INPUTS
DB1–DB12
V
IH
V
IL
Input Current, I
IN
Input Capacitance, C
IN
3.5
V dc
V dc
μ
A
pF
1.5
±
10
10
CONV MODE
(CONV1, CONV2)
V
IH
V
IL
Input Current
Input Capacitance
3.5
V dc
V dc
μ
A
pF
1.5
100
Internal 50 k
Pull-Up Resistor
10
REV. 0
–2–
(V
DD
= +5 V
±
5%; V
SS
= –5 V
±
5% AGND = DGND = O V;
T
A
= –40
°
C to +85
°
C, unless otherwise noted)
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