- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10677 > AD1871YRSZ (Analog Devices Inc)IC ADC STEREO AUDIO 24BIT 28SSOP PDF資料下載
參數(shù)資料
| 型號： | AD1871YRSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC STEREO AUDIO 24BIT 28SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Interfacing AV Converters to Blackfin Processors |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 96k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個單端，單極 |
| 產(chǎn)品目錄頁面： | 777 (CN2011-ZH PDF) |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
AD1871
–12–
REV. 0
TERMINOLOGY
Dynamic Range
The ratio of a full-scale input signal to the integrated input
noise in the pass band (20 Hz to 20 kHz), expressed in decibels
(dB). Dynamic range is measured with a –60 dB input signal
and is equal to (S/[THD+N]) + 60 dB. Note that spurious
harmonics are below the noise with a –60 dB input, so the
noise level establishes the dynamic range. The dynamic range
is specified with and without an A-Weight filter applied.
Signal to (Total Harmonic Distortion + Noise)
(S/[THD+N])
The ratio of the root-mean-square (rms) value of the fundamen-
tal input signal to the rms sum of all other spectral components
in the pass band, expressed in decibels (dB).
Pass Band
The region of the frequency spectrum unaffected by the attenu-
ation of the digital decimator’s filter.
Pass-Band Ripple
The peak-to-peak variation in amplitude response from equal-
amplitude input signal frequencies within the pass band, expressed
in decibels.
Stop Band
The region of the frequency spectrum attenuated by the digital
decimator’s filter to the degree specified by stop-band attenuation.
Gain Error
With a near full-scale input, the ratio of the actual output to the
expected output, expressed as a percentage.
Interchannel Gain Mismatch
With identical near full-scale inputs, the ratio of the outputs of
the two stereo channels, expressed in decibels.
Gain Drift
Change in response to a near full-scale input with a change in
temperature, expressed as parts-per-million (ppm) per
∞C.
Crosstalk (EIAJ Method)
Ratio of response on one channel with a grounded input to a
full-scale 1 kHz sine-wave input on the other channel, expressed
in decibels.
Power Supply Rejection
With no analog input, signal present at the output when a
300 mV p-p signal is applied to power supply pins, expressed in
decibels of full scale.
Group Delay
Intuitively, the time interval required for an input pulse to
appear at the converter’s output, expressed in milliseconds (ms).
More precisely, the derivative of radian phase with respect to
radian frequency at a given frequency.
GLOSSARY
ADC—Analog-to-Digital Converter
DSP—Digital Signal Processor
IMCLK—Internal master clock signal, used to clock the deci-
mating filter section. (Its frequency must be 256
fS.)
MCLK—External master clock signal applied to the AD1871.
Its frequency can be 256, 512, or 768
fS. MCLK is divided
internally to give an IMCLK frequency that must be 256
fS.
MODCLK—This is the -
modulator clock that determines
the sample rate of the modulator. Ideally, it should not exceed
the lower of 6.144 MHz or 128
fS. The MODCLK is derived
from the IMCLK by a divider that can be selected as /2 or /4.
MUX—Multiplexer
PGA—Programmable Gain Amplifier
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 1676859-4 | CAP CER 0.82PF 200V 5% NP0 0805 |
| 1676859-3 | CAP CER 0.68PF 200V 5% NP0 0805 |
| 1676859-2 | CAP CER 0.56PF 200V 5% NP0 0805 |
| 1676859-1 | CAP CER 0.47PF 200V 5% NP0 0805 |
| 1676858-4 | CAP CER 0.82PF 100V 5% NP0 0805 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1871YRSZ | 制造商:Analog Devices 功能描述:IC, ADC, 24BIT, 96KHZ, SSOP-28 |
| AD1871YRSZ-REEL | 功能描述:IC ADC STEREO 24BIT 96KHZ 28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD1876 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit 100 kSPS Sampling ADC |
| AD1876JN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1877 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Supply 16-Bit Stereo ADC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。