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參數(shù)資料
| 型號： | AD1837AAS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP52 |
| 封裝： | PLASTIC, MS-022AC, MQFP-52 |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 401K |
| 代理商： | AD1837AAS |
REV. A
AD1837A
TIMING SPECIFICATIONS
–4–
Parameter
Min
Max
Unit
Comments
MASTER CLOCK AND RESET
t
MH
t
ML
t
PDR
SPI
PORT
t
CCH
t
CCL
t
CCP
t
CDS
t
CDH
t
CLS
t
CLH
t
COE
t
COD
t
COTS
DAC SERIAL PORT (48 kHz and 96 kHz)
Normal Mode (Slave)
t
DBH
t
DBL
f
DB
t
DLS
t
DLH
t
DDS
t
DDH
Packed 128/256 Modes (Slave)
t
DBH
t
DBL
f
DB
t
DLS
t
DLH
t
DDS
t
DDH
ADC SERIAL PORT (48 kHz and 96 kHz)
Normal Mode (Master)
t
ABD
t
ALD
t
ABDD
Normal Mode (Slave)
t
ABH
t
ABL
f
AB
t
ALS
t
ALH
t
ABDD
Packed 128/256 Mode (Master)
t
PABD
t
PALD
t
PABDD
MCLK High
MCLK Low
PD
/
RST
Low
15
15
20
ns
ns
ns
CCLK High
CCLK Low
CCLK Period
CDATA Setup
CDATA Hold
CLATCH Setup
CLATCH Hold
COUT Enable
COUT Delay
COUT Three-State
40
40
80
10
10
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
To CCLK Rising Edge
From CCLK Rising Edge
To CCLK Rising Edge
From CCLK Rising Edge
From CLATCH Falling Edge
From CCLK Falling Edge
From CLATCH Rising Edge
15
20
25
DBCLK High
DBCLK Low
DBCLK Frequency
DLRCLK Setup
DLRCLK Hold
DSDATA Setup
DSDATA Hold
60
60
64 f
S
10
10
10
10
ns
ns
ns
ns
ns
ns
To DBCLK Rising Edge
From DBCLK Rising Edge
To DBCLK Rising Edge
From DBCLK Rising Edge
DBCLK High
DBCLK Low
DBCLK Frequency
DLRCLK Setup
DLRCLK Hold
DSDATA Setup
DSDATA Hold
15
15
256 f
S
10
10
10
10
ns
ns
ns
ns
ns
ns
To DBCLK Rising Edge
From DBCLK Rising Edge
To DBCLK Rising Edge
From DBCLK Rising Edge
ABCLK Delay
ALRCLK Delay
ASDATA Delay
25
5
10
ns
ns
ns
From MCLK Rising Edge
From ABCLK Falling Edge
From ABCLK Falling Edge
ABCLK High
ABCLK Low
ABCLK Frequency
ALRCLK Setup
ALRCLK Hold
ASDATA Delay
60
60
64 f
S
5
15
ns
ns
ns
ns
ns
To ABCLK Rising Edge
From ABCLK Rising Edge
From ABCLK Falling Edge
15
ABCLK Delay
LRCLK Delay
ASDATA Delay
40
5
10
ns
ns
ns
From MCLK Rising Edge
From ABCLK Falling Edge
From ABCLK Falling Edge
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD1837AAS-REEL | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| AD1837AASZ-REEL | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| AD1837 | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| AD1837AS | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| AD1837AS-REEL | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1837AAS-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| AD1837AASZ | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 8DAC 24-Bit 52-Pin MQFP 制造商:Analog Devices 功能描述:IC CODEC SMD 1837 MQFP52 |
| AD1837AASZ-REEL | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 8DAC 24-Bit 52-Pin MQFP T/R |
| AD1837AS | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 8DAC 24-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1837AS-REEL | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 8DAC 24-Bit 52-Pin MQFP T/R |
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