- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄298813 > ACT-7000ASC-300F17I 64-BIT, 300 MHz, RISC PROCESSOR, CQFP208 PDF資料下載
參數(shù)資料
| 型號： | ACT-7000ASC-300F17I |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 300 MHz, RISC PROCESSOR, CQFP208 |
| 封裝： | 1.120 X 1.120 INCH, CERAMIC, QFP-208 |
| 文件頁數(shù)： | 24/26頁 |
| 文件大?。?/td> | 231K |
| 代理商： | ACT-7000ASC-300F17I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁
7
SCD7000A Rev C 9/9/09
Aeroflex Plainview
The memory management unit controls the virtual
memory system page mapping. It consists of an instruction
address translation buffer, or ITLB, a data address
translation buffer, or DTLB, a Joint TLB, or JTLB, and
coprocessor registers used by the virtual memory mapping
sub-system.
System Control Coprocessor Registers
The ACT 7000ASC incorporates all system control
coprocessor (CP0) registers internally. These registers
provide the path through which the virtual memory
system’s page mapping is examined and modified,
exceptions are handled, and operating modes are controlled
(kernel vs. user mode, interrupts enabled or disabled, cache
features). In addition, the ACT 7000ASC includes
registers to implement a real-time cycle counting facility,
to aid in cache and system diagnostics, and to assist in data
error detection.
To support the non-blocking caches and enhanced
interrupt handling capabilities of the ACT 7000ASC, both
the data and control register spaces of CP0 are supported by
the ACT 7000ASC. In the data register space, that is the
space accessed using the MFC0 and MTC0 instructions,
the ACT 7000ASC supports the same registers as found in
the RM5200, R4000 and R5000 families. In the control
space, that is the space accessed by the previously unused
CTC0 and CFC0 instructions, the ACT 7000ASC supports
five new registers. The first three of these new 32-bit
registers
support
the
enhanced
interrupt
handling
capabilities and are the Interrupt Control, Interrupt Priority
Level Lo (IPLLO), and Interrupt Priority Level Hi (IPLHI)
registers. These registers are described further in the
section on interrupt handling. The other two registers,
Imprecise Error 1 and Imprecise Error 2, have been added
to help diagnose bus errors which occur on non-blocking
memory references.
Figure 4 shows the CP0 registers.
Virtual to Physical Address Mapping
The ACT 7000ASC provides three modes of virtual
addressing:
user mode
supervisor mode
kernel mode
This mechanism is available to system software to
provide a secure environment for user processes. Bits in the
CP0 Status register determine which virtual addressing
mode is used. In the user mode, the ACT 7000ASC
provides a single, uniform virtual address space of 256GB
(2GB in 32-bit mode).
When operating in the kernel mode, four distinct virtual
address spaces, totalling 1024GB (4GB in 32-bit mode),
are simultaneously available and are differentiated by the
high-order bits of the virtual address.
The
ACT 7000ASC
processor
also
supports
a
supervisor mode in which the virtual address space is
256.5GB (2.5GB in 32-bit mode), divided into three
regions based on the high-order bits of the virtual address.
Figure 5 shows the address space layout for 32-bit
operation.
Info
7*
Index
0*
Random
1*
Wired
6*
PRid
15*
LLAddr
17*
TagLo
28*
TagHi
29*
EPC
14*
ECC
26*
Status
12*
Context
4*
Count
9*
BadVAddr
8*
Compare
11*
Cause
13*
Watch1
18*
Watch2
19*
ErrorEPC
30*
Config
16*
Perf Counter
25*
Perf Ctr Cntrl
22*
Watch Mask
24*
IPLHI
19*
IPLLO
18*
IntControl
20*
Imp Error 1
26*
Imp Error 2
27*
PageMask
5*
EntryHi
10*
EntryLo1
3*
EntryLo0
2*
TLB
(entries protected
from TLBWR)
Used for memory
management
* Registered number
Used for exception
processing
Control Space Registers
Xcontext
20*
CacheErr
27*
47
0
Figure 4 – CP0 Registers
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ACT4445 | DATACOM, MIL-STD-1553 DATA BUS TRANSCEIVER, BCC64 |
| ACTS04KMSR-02 | ACT SERIES, HEX 1-INPUT INVERT GATE, CDFP14 |
| ACTS04DMSR-02 | ACT SERIES, HEX 1-INPUT INVERT GATE, CDIP14 |
| ACTS08DMSR | ACT SERIES, QUAD 2-INPUT AND GATE, CDIP14 |
| ACTS138HMSR-02 | ACT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, UUC16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ACT7000SC | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:ACT 7000SC 64-Bit Superscaler Microprocessor |
| ACT-7000SC-150F17C | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:ACT 7000SC 64-Bit Superscaler Microprocessor |
| ACT-7000SC-150F17I | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:ACT 7000SC 64-Bit Superscaler Microprocessor |
| ACT-7000SC-150F17M | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:ACT 7000SC 64-Bit Superscaler Microprocessor |
| ACT-7000SC-150F17Q | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:ACT 7000SC 64-Bit Superscaler Microprocessor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。