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參數(shù)資料
| 型號： | ACH16843DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | JT 6C 6#20 PIN PLUG |
| 中文描述： | ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 84K |
| 代理商： | ACH16843DGG |
Philips Semiconductors
Product specification
74ALVCH16843
18-bit bus interface D-type latch (3-State)
1998 Aug 04
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1
1CLR
Clear input (active LOW)
2
1OE
Output enable input (active
LOW)
55
1PRE
Preset input (active LOW)
56
1LE
Latch enable input (active
HIGH)
54, 52, 51, 49, 48,
47, 45, 44, 43
1D0 to 1D8
Data inputs
3, 5, 6, 8, 9,
10, 12, 13, 14
1Q0 to 1Q8
Data outputs
4, 11, 18, 25,
32, 39, 46, 53
GND
Ground (0V)
7, 22, 35, 50
V
CC
Positive supply voltage
27
2OE
Output enable input (active
LOW)
28
2CLR
Clear input (active LOW)
29
2LE
Latch enable input (active
HIGH)
30
2PRE
Preset input (active LOW)
42, 41, 40, 38, 37,
36, 34, 33, 31
2D0 to 2D8
Data inputs
15, 16, 17, 19, 20,
21, 23, 24, 26
2Q0 to 2Q8
Data outputs
FUNCTION TABLE
INPUTS
OUTPUT
nPRE
nCLR
nOE
LE
D
X
X
Q
L
X
L
X
H
H
L
L
X
X
L
H
H
L
H
L
L
H
H
L
H
H
H
H
H
L
H
X
Q
0
Z
X
X
H
H
X
H
L
X
Z
=
=
=
=
HIGH voltage level
LOW voltage level
Don’t care
High impedance “off” state
LOGIC SYMBOL
54
52
51
49
48
47
45
44
41
40
38
37
36
34
33
31
3
5
6
8
9
10
12
13
16
17
19
20
21
23
24
26
1D
0
1D
1
1D
2
1D
3
1D
4
1D
5
1D
6
1D
7
1D
8
2D
0
2D
1
2D
2
2D
3
2D
4
2D
5
2D
6
2D
7
2D
8
1Q
0
1Q
1
1Q
2
1Q
3
1Q
4
1Q
5
1Q
6
1Q
7
1Q
8
2Q
0
2Q
1
2Q
2
2Q
3
2Q
4
2Q
5
2Q
6
2Q
7
2Q
8
1OE
1LE
2OE
2LE
2
56
27
29
SH00144
1CLR
1PRE
2CLR
2PRE
1
55
28
30
14
15
43
42
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