參數(shù)資料
型號: ACE1501EMTX
廠商: Fairchild Semiconductor Corporation
英文描述: ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications
中文描述: ACE1501產(chǎn)品系列運(yùn)算控制器引擎(ACEx⑩)的低功耗應(yīng)用
文件頁數(shù): 14/33頁
文件大?。?/td> 1187K
代理商: ACE1501EMTX
A
)
14
www.fairchildsemi.com
ACE1501 Product Family Rev. 1.
1
Table 11. Timer 1 Control Register (T1CNTRL)
Table 12. Timer 1 Operating Modes
4.2 Mode 1: Pulse Width Modulation (PWM) Mode
In the PWM mode, the timer counts down at the instruction
clock rate. When an under
fl
ow occurs, the timer register is
reloaded from T1RA/T1RB and the count down proceeds from
the loaded value. At every under
fl
ow, a pending
fl
ag (T1PND)
located in the T1CNTRL register is set. Software must then
clear the T1PND
fl
ag and load the T1RA/T1RB register with an
alternate PWM value (if desired.) In addition, the timer can be
con
fi
gured to toggle the T1 output bit upon under
fl
ow. Con
fi
gur-
ing the timer to toggle T1 results in the generation of a signal
outputted from port G2 with the width and duty cycle controlled
by the values stored in the T1RA/T1RB. A block diagram of the
timer
s PWM mode of operation is shown in Figure 15.
The PWM timer can be con
fi
gured to use the T1RA register only
for auto-reloading the timer registers or can be con
fi
gured to
use both T1RA and T1RB alternately. If the T1RBEN bit of the
T1CNTRL register is 0, the PWM timer will reload using only
T1RA ignoring any value store in the T1RB register. However, if
the T1RBEN bit is 1 the PWM timer will be reloaded using both
the T1RA and T1RB registers. A hardware select logic is imple-
mented to select between T1RA and T1RB alternately, always
starting with T1RA, every timer under
fl
ows to auto-reload the
timer registers. This feature is useful when a signal with variable
duty cycle needs to be generated without software intervention.
The timer has one interrupt (TMRI1) that is maskable through
the T1EN bit of the T1CNTRL register. However, the core is only
interrupted if the T1EN bit and the G (Global Interrupt enable)
bit of the SR is set. If interrupts are enabled, the timer will gen-
erate an interrupt each time T1PND
fl
ags is set (whenever the
timer under
fl
ows provided that the pending
fl
ag was cleared.)
The interrupt service routine is responsible for proper handling
of the T1PND
fl
ag and the T1EN bit.
The interrupt will be synchronous with every rising and falling
edge of the T1 output signal. Generating interrupts only on ris-
ing or falling edges of T1 is achievable through appropriate han-
dling of the T1EN bit or T1PND
fl
ag through software.
T1CNTRL Register
Bit Name
Function
Bit 7
T1C3
Timer TIMER1 control bit 3 (see Table 12)
Bit 6
T1C2
Timer TIMER1 control bit 2 (see Table 12)
Bit 5
T1C1
Timer TIMER1 control bit 1 (see Table 12)
Bit 4
T1C0
Timer TIMER1 run: 1= Start timer, 0 = Stop timer;
or Timer TIMER1 under
fl
ow interrrupt pending
fl
ag in input capture mode
Bit 3
T1PND
Timer1 interrupt pending
fl
ag: 1 = Timer1 interrupt
Pending, 0 = Timer1 interrupt not pending
Bit 2
T1EN
Timer1 interrupt enable bit: 1 = Timer1 interrupt enabled,
0 = Timer1 interrupt disabled
Bit 1
M1S1
Capture type: 0 = Pulse capture, 1 = Cycle capture (see Table 12)
Bit 0
T1RBEN
PWM Mode: 0 = Timer1 reload on T1RA, 1 = TIMER1 reload on T1RA and T1RB
(always starting with T1RA)
T1
C3
T1
C2
T1
C1
M4
S1
T1
RB
Timer Mode Source
Interrupt
Timer Counts-on
0
0
0
X
X
MODE 2
TIMER1 Under
fl
ow
T1 Pos. Edge
0
0
1
X
X
MODE 2
TIMER1 Under
fl
ow
T1 Neg. Edge
1
0
1
X
0
MODE 1 T1 Toggle
Autoreload T1RA
Instruction Clock
1
0
0
X
0
MODE 1 No T1 Toggle
Autoreload T1RA
Instruction Clock
1
0
1
X
1
MODE 1 T1 Toggle
Autoreload T1RA/T1RB
Instruction Clock
1
0
0
X
1
MODE 1 No T1 Toggle
Autoreload T1RA/T1RB
Instruction Clock
0
1
0
X
X
MODE 3 Captures:
T1 Pos Edge
Pos. T1 Edge
Instruction Clock
0
1
1
X
X
MODE 3 Captures:
T1 Neg Edge
Neg. T1 Edge
Instruction Clock
1
1
0
0
X
MODE 4
Pos. to Neg.
Instruction Clock
1
1
0
1
X
MODE 4
Pos. to Pos.
Instruction Clock
1
1
1
0
X
MODE 4
Neg. to Pos.
Instruction Clock
1
1
1
1
X
MODE 4
Neg. to Neg.
Instruction Clock
相關(guān)PDF資料
PDF描述
ACE1501EMX ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications
ACE1501EN ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications
ACE1501VM ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications
ACE1501EM ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications
ACE1501EM8 ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications
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ACE1501EMX 功能描述:8位微控制器 -MCU arithmetic Controllr Engine RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ACE1501EN 功能描述:8位微控制器 -MCU arithmetic Controllr Engine RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ACE1501EN14 功能描述:8位微控制器 -MCU arithmetic Controllr Engine RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ACE1501V 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications
ACE1501VM 功能描述:8位微控制器 -MCU arithmetic Controllr Engine RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT