參數(shù)資料
型號(hào)： AAT1236IRN-T1
廠商： Advanced Analog Technology,lnc.
元件分類： LED驅(qū)動(dòng)器
英文描述： High Efficiency White LED Drivers for Backlight and Keypad
中文描述： 高效率白光LED的背光和鍵盤驅(qū)動(dòng)程序
文件頁(yè)數(shù)： 12/24頁(yè)
文件大?。?/td> 1009K
代理商： AAT1236IRN-T1
AAT1236
High Efficiency White LED Drivers
for Backlight and Keypad
12
1236.2007.02.1.1
I
2
C Serial Interface and
Programmability
The current sink magnitude of each group and the
on/off status of each channel is controlled via an
I
2
C serial interface. I
2
C is a widely used interface
which requires a master to initiate all the commu-
nications with the device. I
2
C protocol consists of
two active wire SDA (serial data line) and SCL
(serial clock line). Both wires are open drain and
require an external pull-up resistor to V
CC
. The
SDA pin serves the I/O function, and the SCL pin
controls and references the I
2
C bus. The I
2
C pro-
tocol is a bidirectional bus which allows both read
and write actions to take place; the AAT1236 sup-
ports the write protocol only. Since the protocol
has a dedicated bit for Read or Write (R/W), when
communicating with the AAT1236, this bit must be
set to "0."
I
2
C Programming Register Address
and Register Data
After sending the device address, the I
2
C master
should send an 8-bit register address and 8-bit data
for programming. The AAT1236 has two registers;
The Brightness Control Register determines the
percentage of the maximum current set by R
SET
applied to each channel and the Channel Control
Register determines which channels are enabled or
disabled. The programming is as follows:
BR_CRTL–LED Brightness Control Register
(Address: 00h)
Control register BR_CRTL can be used to control
LED brightness for each group. Control bits BX3,
BX2, BX1, BX0 set the percentage of the maximum
LED level in Group B. Control bits AX3, AX2, AX1,
AX0 set the percentage of the maximum LED level
in Group A.
Table 1: LED Current Setting as Percentage of
the Maximum Level Set by R
SET
.
CH_CRTL–Channel ON/OFF Control Register
(Address: 01h)
Control register CH_CRTL can be used to disable
(OFF) or enable (ON) individual channels.
CH_CTRL
[AY1:AY3]
A1
A2
A3
000
001
010
011
100
101
110
111
OFF
OFF
OFF
OFF
ON
ON
ON
ON
OFF
OFF
ON
ON
OFF
OFF
ON
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
CH_CTRL [BY1:BY2]
B1
B2
00
01
10
11
OFF
OFF
ON
ON
OFF
ON
OFF
ON
–
–
–
BY1
BY2
AY1
AY2
AY3
D7
CH_CTRL
Bit
name
D6
D5
D4
D3
D2
D1
D0
BR_CTRL
[BX3:BX0], [AX3:AX0]
All Outputs (%)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
100
84
71
60
51
43
35
31
26
21
18
15
13.5
12.0
10.5
9.0
BX3 BX2
BX1
BX0
AX3
AX2
AX1
AX0
D7
BR_CTRL
Bit
name
D6
D5
D4
D3
D2
D1
D0
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