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參數(shù)資料
| 型號(hào)： | A8906CLB |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | BIDIRECTIONAL 3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING |
| 中文描述： | 雙向三相無(wú)刷直流電機(jī)控制器/返回驅(qū)動(dòng)程序，電磁場(chǎng)遙感 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 159K |
| 代理商： | A8906CLB |
8906
BIDIRECTIONAL
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
SERIAL PORT TIMING CONDITIONS
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
C
WD
Current
I
CWD
Charging
-9.0
-10
-11
μ
A
C
WD
Threshold Voltage
V
TL
0.22
0.25
0.28
V
V
TH
2.25
2.5
2.75
V
Max. FLL Oscillator Frequency
f
OSC
V
DD
= 5.0 V, T
A
= 25
°
C
12
—
—
MHz
I
OUT
(MAX)
—
D3 = 0, D4 = 0
1.0
1.2
1.4
A
D3 = 0, D4 = 1
0.9
1.0
1.1
A
D3 = 1, D4 = 0
0.5
0.6
0.7
A
D3 = 1, D4 = 1
—
250
—
mA
BRAKE Threshold
V
BRK
1.5
1.75
2.0
V
BRAKE Hysteresis Current
I
BRKL
V
BRK
= 750 mV
—
20
—
μ
A
Transconductance Gain
g
m
0.42
0.50
0.58
A/V
Centertap Resistors
R
CT
5.0
10
13
k
Back-EMF Hysteresis
—
V
BEMF
- V
CTAP
at
5.0
20
37
mV
FCOM Transition
-5.0
-20
-37
mV
ELECTRICAL CHARACTERISTICS continued
DATA
CLOCK
Dwg. WP-019
A
C
B
D
C
D
CHIP SELECT
E
A.
Minimum CHIP SELECT setup time before CLOCK rising edge..........
100 ns
B.
Minimum CHIP SELECT hold time after CLOCK rising edge...............
150 ns
C.
Minimum DATA setup time before CLOCK rising edge........................
150 ns
D.
Minimum DATA hold time after CLOCK rising edge.............................
150 ns
E.
Minimum CLOCK low time before CHIP SELECT..................................
50 ns
F.
Maximum CLOCK frequency ..............................................................
3.3 MHz
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