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參數(shù)資料
| 型號(hào)： | A8906CLB |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | BIDIRECTIONAL 3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING |
| 中文描述： | 雙向三相無刷直流電機(jī)控制器/返回驅(qū)動(dòng)程序，電磁場(chǎng)遙感 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 159K |
| 代理商： | A8906CLB |
8906
BIDIRECTIONAL
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Dwg. EP-036C
SECTOR
DATA
CHIP SELECT
+5 V
VRET
CWD
CD2
CD1
RESET
CLOCK
DATA IN
VBB
CST
RES
0.22
μ
F
C
CF2
RF1
CF1
BYPASS
BYPASS
1
2
3
4
5
6
7
8
9
9
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
DD
V
BB
V
S
FLL
MUX
COMMUTATION
DELAY
BOOST
CHARGE
PUMP
OSC (REF)
DATA OUT
FAULT
RB
CB
TYPICAL APPLICATION
BRAKE
FAULT
VBRK
VFAULT D
–
V
BRAKE
ACTIVATED
Dwg. OP-004
RB
CB
t BRK
Braking.
A dynamic braking feature of the A8906CLB shorts the
three motor windings to ground. This is accomplished by turning the
three source drivers OFF and the three sink drivers ON. Activation of
the brake can be implemented through the BRAKE input. The supply
voltage for the brake circuitry is the C
RES
voltage, allowing the brake
function to remain active after power failure. Power-down braking with
delay can be implemented by using an external RC and other compo-
nents to control the brake terminal, as shown. Brake delay can be set
using the equation below. Once the brake is activated, due to the
inherent capacitive input, the three sink
drivers will remain active until the device is
reset.
t
BRK
= R
B
C
B
1
–
l
n
Centertap.
The A8906CLB internally
simulates the centertap voltage of the motor.
To obtain reliable start-up performance from
motor to motor, the motor centertap should be
connected to this terminal.
External Component Selection.
Appli-
cations information regarding the selection of
external component values is available from
the factory for external component selection,
frequency-locked loop speed control, and
commutation delay capacitor selection.
V
BRK
V
FAULT -
V
D
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