參數(shù)資料
型號(hào): A8905CLB
廠商: Allegro MicroSystems, Inc.
英文描述: 3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING
中文描述: 3相無刷直流電動(dòng)機(jī)控制器/驅(qū)動(dòng)器,反電動(dòng)勢(shì)遙感
文件頁數(shù): 10/12頁
文件大?。?/td> 163K
代理商: A8905CLB
8905
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
D0- Sleep/Run Mode; LOW = Sleep, HIGH = Run
This bit allows the device to be powered down when not in
use.
D1- Step Mode; LOW = Normal Operation, HIGH = Step Only
When in the step-only mode the back-EMF commutation
circuitry is disabled and the power outputs are commutated
by the start-up oscillator. This mode is intended for device
and system testing.
D2- Brake; LOW = Run, HIGH = Brake.
D3 and D4-These two bits set the output current limit:
D3
D4
Current Limit
0
0
1
1
0
1
0
1
Saturated
1 A
800 mA
600 mA
D5 thru D18-This 14-bit word (active low) programs the
REF
time
to set desired motor speed.
Bit Number
Count Number
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
16
32
64
128
256
512
1 024
2 048
4 096
8 192
16 384
32 768
65 536
131 072
SERIAL PORT BIT DEFINITIONS
D19-Speed-control mode switch;
LOW = internal once-around speed signal,
HIGH = external index data.
D20 and D21-These bits program the number of motor poles
for the once-around
FCOM
counter:
D20
D21
Motor Poles
0
0
1
1
0
1
0
1
8
16
12
D22 and D23-Control the multiplexer for DATA OUT:
D22
D23
Data Out
0
0
1
1
0
1
0
1
TACH (once around or index)
Thermal Shutdown
SYNC
FCOM
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