參數(shù)資料
型號(hào): A54SX08A-3CQ208B
廠商: Electronic Theatre Controls, Inc.
元件分類: FPGA
英文描述: SX-A Family FPGAs
中文描述: 的SX - A系列FPGA的
文件頁數(shù): 25/108頁
文件大?。?/td> 720K
代理商: A54SX08A-3CQ208B
SX-A Family FPGAs
v5.1
2-5
Figure 2-1
shows the 5 V PCI V/I curve and the minimum and maximum PCI drive characteristics of the SX-A family.
I
OH
= 11.9 * (V
OUT
– 5.25) * (V
OUT
+ 2.45)
for V
CCI
> V
OUT
> 3.1V
EQ 2-1
I
OL
= 78.5 * V
OUT
* (4.4 – V
OUT
)
for 0V < V
OUT
< 0.71V
EQ 2-2
Figure 2-1
5 V PCI V/I Curve for SX-A Family
Voltage Out (V)
–200.0
–150.0
–100.0
–50.0
0.0
50.0
100.0
150.0
200.0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
C
IOH
IOL
IOH MIN Spec
IOH MAX Spec
IOL MIN Spec
IOL MAX Spec
Table 2-9
DC Specifications (3.3 V PCI Operation)
Symbol
Parameter
Condition
Min.
Max.
Units
V
CCA
V
CCI
V
IH
V
IL
I
IPU
I
IL
V
OH
V
OL
C
IN
C
CLK
Notes:
1. This specification should be guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a
floated network. Designers should ensure that the input buffer is conducting minimum current at this input voltage in applications
sensitive to static power utilization.
2. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
3. Absolute maximum pin capacitance for a PCI input is 10 pF (except for CLK).
Supply Voltage for Array
2.25
2.75
V
Supply Voltage for I/Os
3.0
3.6
V
Input High Voltage
0.5V
CCI
–0.5
V
CCI
+ 0.5
0.3V
CCI
V
Input Low Voltage
Input Pull-up Voltage
1
Input Leakage Current
2
V
0.7V
CCI
–10
V
0 < V
IN
< V
CCI
I
OUT
= –500 μA
I
OUT
= 1,500 μA
+10
μ
A
Output High Voltage
0.9V
CCI
V
Output Low Voltage
Input Pin Capacitance
3
0.1V
CCI
10
V
pF
CLK Pin Capacitance
5
12
pF
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