參數(shù)資料
型號: A54SX08-VQ100I
廠商: Microsemi SoC
文件頁數(shù): 16/64頁
文件大?。?/td> 0K
描述: IC FPGA SX 12K GATES 100-VQFP
標準包裝: 90
系列: SX
LAB/CLB數(shù): 768
輸入/輸出數(shù): 81
門數(shù): 12000
電源電壓: 3 V ~ 3.6 V,4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
供應商設備封裝: 100-VQFP(14x14)
SX Family FPGAs
v3.2
1-19
Figure 1-11 shows the characterized power dissipation numbers for the shift register design using frequencies ranging
from 1 MHz to 200 MHz.
Junction Temperature (TJ)
The temperature that you select in Designer Series
software is the junction temperature, not ambient
temperature. This is an important distinction because the
heat generated from dynamic power consumption is
usually hotter than the ambient temperature. Use the
equation below to calculate junction temperature.
Junction Temperature =
ΔT + T
a
EQ 1-13
Where:
Ta = Ambient Temperature
ΔT = Temperature gradient between junction (silicon)
and ambient
ΔT = θ
ja × P
P
= Power
calculated
from
Estimating
Power
Consumption section
θ
ja = Junction to ambient of package. θja numbers are
Package Thermal Characteristics
The device junction to case thermal characteristic is
θ
jc,
and the junction to ambient air characteristic is
θ
ja. The
thermal characteristics for
θ
ja are shown with two
different air flow rates.
The maximum junction temperature is 150
°C.
A sample calculation of the absolute maximum power
dissipation allowed for a TQFP 176-pin package at
commercial temperature and still air is as follows:
EQ 1-14
Figure 1-11 Power Dissipation
0
200
400
600
800
1000
1200
Frequency MHz
Power
Dissipation
mW
20
0
40
60
80
100
120
140
160
180
200
Maximum Power Allowed
Max. junction temp. (°C) – Max. ambient temp. (°C)
θ
ja (°C/W)
------------------------------------------------------------------------------------------------------------------------------------
150°C – 70°C
28°C/W
-----------------------------------
2.86 W
==
=
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