參數(shù)資料
型號： A42MX16-2CQ100
廠商： Electronic Theatre Controls, Inc.
英文描述： 40MX and 42MX FPGA Families
中文描述： 40MX和42MX FPGA系列
文件頁數(shù)： 28/120頁
文件大?。?/td> 854K
代理商： A42MX16-2CQ100
15
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
3.5.4.1
The X-register, Y-register, and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are 16-bit address pointers for indirect addressing of the data space. The three indirect
address registers X, Y, and Z are defined as described in Figure 3-4.
Figure 3-4.
The X-, Y-, and Z-registers
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
3.5.5
Stack Pointer
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. The Stack Pointer Register always points
to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-
tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack
Pointer.
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt
Stacks are located. This Stack space in the data SRAM must be defined by the program before
any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be set to
point above 0x100, preferably RAMEND. The Stack Pointer is decremented by one when data is
pushed onto the Stack with the PUSH instruction, and it is decremented by two when the return
address is pushed onto the Stack with subroutine call or interrupt. The Stack Pointer is incre-
mented by one when data is popped from the Stack with the POP instruction, and it is
incremented by two when return address is popped from the Stack with return from subroutine
RET or return from interrupt RETI.
The Atmel AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The
number of bits actually used is implementation dependent. Note that the data space in some
implementations of the Atmel AVR architecture is so small that only SPL is needed. In this case,
the SPH Register will not be present.
In ATA6289 only SP9 and SP8 of High Byte (SPH) are in use.
15
XH
XL
0
X-register
7
0
7
0
R27(0x1B)
R26 (0x1A)
15
YH
YL
0
Y-register
7
0
7
0
R29 (0x1D)
R28 (0x1C)
15
ZH
ZL
0
Z-register
7
0
7
0
R31 (0x1F)
R30 (0x1E)
相關(guān)PDF資料
PDF描述
A42MX24-2CQ100 40MX and 42MX FPGA Families
A42MX36-2CQ100 Sensor Cable Assembly; Connector Type A:M12 Plug; Connector Type B:M12 Receptacle; Cable Length:2m; No. of Contacts:12; No. of Positions:12 RoHS Compliant: Yes
A42MX02-2CQ100A Sensor Cable Assembly; Connector Type A:M12 Plug; Connector Type B:Stripped End Leads; Cable Length:5m; No. of Contacts:12; No. of Positions:12 RoHS Compliant: Yes
A42MX04-2CQ100A Sensor Cable Assembly; Connector Type A:M12 Plug; Connector Type B:M12 Receptacle; Cable Length:5m; No. of Contacts:12; No. of Positions:12 RoHS Compliant: Yes
A42MX09-2CQ100A 40MX and 42MX FPGA Families
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A42MX16-2CQ100A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX16-2CQ100B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX16-2CQ100ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX16-2CQ100I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX16-2CQ100M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
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