參數(shù)資料
型號: A42MX16-2BG100ES
廠商: Electronic Theatre Controls, Inc.
英文描述: 40MX and 42MX FPGA Families
中文描述: 40MX和42MX FPGA系列
文件頁數(shù): 95/120頁
文件大小: 854K
代理商: A42MX16-2BG100ES
76
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
If the Watchdog is accidentally enabled, for example by a runaway pointer or brown-out condi-
tion, the device will be reset and the Watchdog Timer will stay enabled. If the code is not set up
to handle the Watchdog, this might lead to an eternal loop of time-out resets. To avoid this situa-
tion, the application software should always clear the Watchdog System Reset Flag (WDRF)
and the WDE control bit in the initialisation routine, even if the Watchdog is not in use.
The following code example shows one assembly and one C function for changing the time-out
value of the Watchdog Timer. The Watchdog Timer should be reset before any change of the
WDPS bits, since a change in the WDPS bits can result in a time-out when switching to a shorter
time-out period:
Note:
Assembly Code Example(1)
WDT_Prescaler_Change:
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds r16, WDTCR
ori r16, (1<<WDCE) | (1<<WDE)
sts WDTCR, r16
; -- Got four cycles to set the new values from here -
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi r16, (1<<WDE) | (1<<WDPS2) | (1<<WDPS0)
sts WDTCR, r16
; -- Finished setting new values, used 2 cycles -
; Turn on global interrupt
sei
C Code Example(1)
void WDT_Prescaler_Change(void)
{
__disable_interrupt();
__watchdog_reset();
/* Start timed equence */
WDTCR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCR = (1<<WDE) | (1<<WDPS2) | (1<<WDPS0);
__enable_interrupt();
}
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