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參數(shù)資料
| 型號(hào)： | A42MX16-2BG100ES |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁(yè)數(shù)： | 104/120頁(yè) |
| 文件大小： | 854K |
| 代理商： | A42MX16-2BG100ES |
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84
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
3.13.5.3
Timer2 Output Modes
The modulator consists of a toggle flip-flop (T2), a synchronous serial interface (SSI) with control
logic and registers (see Section 3.13.5.5 “Modulator Synchronous Serial Interface (SSI)” on
page 86) and three external interface pins (T2O1, T2O2, SDIN). T2O1 and T2O2 are output pins
and SDIN is an input pin. The modulator has different modes, which can be selected with the
T2M[3..0] bits in the T2MRB register. Figure 3-31 shows a simplified schematic how the setting
of the T2M[3..0] bits affects the functionality of the I/O ports. Only the parts of the general I/O
port control registers (DDR and Port) that are affected by the T2M[3..0] bits are shown. The Fig-
ure 3-31 shows the Timer2 modulator stage.
Figure 3-31. Timer2 Modulator Stage
Signal description (internal signals):
CLK
T2
Timer/counter2 stage clock output
SI
SSI serial data input
M2
Output signal of the T2 (toggle flip-flop)
SDIN
External serial data input
SCLK
SSI shift clock output
SO
SSI serial data output
T2RXD
SSI receive buffer full interrupt
T2TXD
SSI transmit buffer empty interrupt
T2TXC
SSI transmit complete interrupt
Receive Buffer (RXB)
T2
D
ATA
B
U
S
T2TOP
DDR
Control
Port
DDR
Port
T2TXB
T2TXC
T2RXB
PD5/T2O1
SSI
SO
SLK
M2
SI
T2M(3...0)
8-bit SR
T2MDR
T2IMR
T2IFR
T2MRB
Transmit Buffer (TXB)
T2M(3...0),
T2TOP
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
CLK
CLKT2
PD6/T2O2
PD7/SDIN
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| A42MX24-2BG100ES | Proximity Sensor; Sensor Input Type:Inductive; Sensing Range Max:30mm; Sensor Output Type:NPN Transistor; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensing Face Diameter:30mm; Sensor Housing:Barrel |
| A42MX36-2BG100ES | 40MX and 42MX FPGA Families |
| A42MX02-2BG100I | 40MX and 42MX FPGA Families |
| A42MX04-2BG100I | 40MX and 42MX FPGA Families |
| A42MX09-2BG100I | 40MX and 42MX FPGA Families |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-2BG100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2CQ100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2CQ100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2CQ100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
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