參數(shù)資料
型號(hào)： A23W8308
英文描述： 262.144 X 8 BIT CMOS MASK ROM
中文描述： 262.144 × 8位CMOS掩膜ROM
文件頁(yè)數(shù)： 6/12頁(yè)
文件大小： 190K
代理商： A23W8308
A23W8308
PRELIMINARY (November, 1999, Version 0.0)
5
AMIC Technology, Inc.
Capacitance
Symbol
Parameter
Min.
Max.
Unit
Test Conditions
Note
C
I
Input Capacitance
10
pF
T
A
= 25
°
C
f = 1.0MHz
3
C
O
Output Capacitance
10
pF
AC Characteristics
(T
A
= 0
°
C to +70
°
C, GND = 0V)
Symbol
Parameter
5.0V
±
10%
3.0V
±
10%
Unit
Note
Min.
Max.
Min.
Max.
t
CYC
Cycle Time
120
150
ns
t
AA
Address Access Time
120
150
ns
t
ACE
Chip Enable Access Time
120
150
ns
t
AOE
Output Enable Access Time
70
90
ns
t
OH
Output Hold after Address Change
10
10
ns
t
LZ
Output Low Z Delay
10
10
ns
4, 6
t
HZ
Output High Z Delay*
30
70
ns
5, 6
* t
HZ
is specified from either OE /
OE
or CE /
CE
going disabled, whichever occurs first.
Notes:
1. OE/CE = V
IL
,
OE
/
CE
= V
IH
(Output is unloaded)
2. V
IN
= V
IH
/V
IL,
but OE/CE = V
IH
,
OE
/
CE
= V
IL
(Output is unloaded)
3. This parameter is periodically sampled and is not 100% tested. All pins, except pins under test, are tied to AC ground.
4. Output LOW impedance delay (t
LZ
) is measured from
CE
or
OE
going active.
5. Output HIGH impedance delay (t
HZ
) is measured from
CE
or
OE
going inactive.
6. This parameter is sampled and not 100% tested.
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