參數(shù)資料
型號(hào): A1425A-2VQG100I
元件分類: FPGA
英文描述: FPGA, 310 CLBS, 2500 GATES, PQFP100
封裝: 1 MM HEIGHT, VQFP-100
文件頁(yè)數(shù): 65/68頁(yè)
文件大?。?/td> 489K
代理商: A1425A-2VQG100I
1-242
Package Pin Assignments (continued)
257-Pin CPGA (Top View)
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
V
X
Y
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
V
X
Y
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19
257-Pin
CPGA
A14100 Function
Location
CLKA or I/O
L4
CLKB or I/O
L5
DCLK or I/O
E4
GND
B16, C4, D4, D10, D16, E11, J5, K4, K16, L15, R4, T4, T10, T16, T17, X7
HCLK or I/O
J16
IOCLK or I/O
T5
IOPCL or I/O
R16
MODE
A5
NC
E5
PRA OR I/O
J1
PRB or I/O
J17
SDI or I/O
B4
VCC
C3, C10, C13, C17, K3, K17, V3, V7, V10, V17, X14
Notes:
1.
Unused I/O pins are designated as outputs by ALS and are driven low.
2.
All unassigned pins are available for use as I/Os.
3.
MODE should be terminated to GND through a 10K resistor to enable Actionprobe usage; otherwise it can be terminated directly to GND.
相關(guān)PDF資料
PDF描述
A1425A-PLG84C FPGA, 310 CLBS, 2500 GATES, 125 MHz, PQCC84
A1425A-PLG84I FPGA, 310 CLBS, 2500 GATES, PQCC84
A1425A-PQG100C FPGA, 310 CLBS, 2500 GATES, 125 MHz, PQFP100
A1425A-PQG100I FPGA, 310 CLBS, 2500 GATES, PQFP100
A1425A-PQG160C FPGA, 310 CLBS, 2500 GATES, 125 MHz, PQFP160
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