參數(shù)資料
型號: A1425A-2VQG100I
元件分類: FPGA
英文描述: FPGA, 310 CLBS, 2500 GATES, PQFP100
封裝: 1 MM HEIGHT, VQFP-100
文件頁數(shù): 6/68頁
文件大?。?/td> 489K
代理商: A1425A-2VQG100I
1-188
5V Operating Conditions
Absolute Maximum Ratings 1
Free air temperature range
Recommended Operating Conditions
Electrical Specifications
Symbol
Parameter
Limits
Units
VCC
DC Supply Voltage
–0.5 to +7.0
V
VI
Input Voltage
–0.5 to VCC +0.5
V
VO
Output Voltage
–0.5 to VCC +0.5
V
IIO
I/O Source Sink
Current2
±20
mA
TSTG
Storage Temperature
–65 to +150
°C
Notes:
1.
Stresses beyond those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to
absolute maximum rated conditions for extended periods may
affect device reliability. Device should not be operated outside
the Recommended Operating Conditions.
2.
Device inputs are normally high impedance and draw
extremely low current. However, when input voltage is greater
than VCC + 0.5 V or less than GND – 0.5 V, the internal protection
diodes will forward bias and can draw excessive current.
Parameter
Commercial Industrial Military
Units
Temperature
Range1
0 to +70
–40 to +85
–55 to
+125
°C
5V Power
Supply
Tolerance
±5
±10
%VCC
Note:
1.
Ambient temperature (TA) is used for commercial and
industrial; case temperature (TC) is used for military.
Symbol Parameter
Test Condition
Commercial
Industrial
Military
Units
Min.
Max.
Min.
Max.
Min.
Max.
VOH
1,2
HIGH Level Output
IOH = –4 mA (CMOS)
3.7
V
IOH = –6 mA (CMOS) 3.84
V
IOH = –10 mA (TTL)
3
2.40
V
VOL
1,2
LOW Level Output
IOL = +6 mA (CMOS)
0.33
0.4
V
IOL = +12 mA (TTL)
3
0.50
V
VIH
HIGH Level Input
TTL Inputs
2.0
VCC + 0.3
2.0
VCC + 0.3
2.0
VCC + 0.3
V
VIL
LOW Level Input
TTL Inputs
–0.3
0.8
–0.3
0.8
–0.3
0.8
V
IIN
Input Leakage
VI = VCC or GND
–10
+10
–10
+10
–10
+10
A
IOZ
3-state Output Leakage
VO = VCC or GND
–10
+10
–10
+10
–10
+10
A
CIO
I/O Capacitance3,4
10
pF
ICC(S)
Standby VCC Supply Current (typical = 0.7 mA)
2
10
20
mA
ICC(D)
Dynamic VCC Supply Current See “Power Dissipation” Section
Notes:
1.
Actel devices can drive and receive either CMOS or TTL signal levels. No assignment of I/Os as TTL or CMOS is required.
2.
Tested one output at a time, VCC = min.
3.
Not tested, for information only.
4.
VOUT = 0V, f = 1 MHz.
5.
Typical standby current = 0.7 mA. All outputs unloaded. All inputs = VCC or GND.
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